Untitled
Abstract: No abstract text available
Text: CDCU2A877 www.ti.com SCAS827A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
|
Original
|
PDF
|
CDCU2A877
SCAS827A
CDCUA877
52-Ball
65-mm
|
20-PIN
Abstract: DS96174 LTC487 MAX3042 MC3487 SN75174
Text: SN65LBC174A-EP QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVER www.ti.com SLLS732 – OCTOBER 2006 – REVISED DECEMBER 2006 FEATURES • • • • • • • • • • • • • • 1 (2) Controlled Baseline – One Assembly/Test Site, One Fabrication
|
Original
|
PDF
|
SN65LBC174A-EP
RS-485
SLLS732
TIA/EIA-485,
TIA/EIA-422,
20-PIN
DS96174
LTC487
MAX3042
MC3487
SN75174
|
QFN16L
Abstract: ST2349A ST2349AQTR
Text: ST2349A 4-bit dual supply level translator without direction control pin Features • 18 Mbps max data rate when driven by a totem pole driver ■ 6.8 Mbps (max) data rate when driven by an open drain pole driver ■ Bi-directional level translation without
|
Original
|
PDF
|
ST2349A
QFN16
QFN16L
ST2349A
ST2349AQTR
|
KD1084
Abstract: KD1084AD2T18R KD1084ADT-R KD1084AXX KD1084AXX18
Text: KD1084AXX KD1084AXX18 5 A low drop positive voltage regulator adjustable and fixed Features • Typical dropout 1.3 V at 5 A ■ Three terminal adjustable or fixed output voltage 1.8 V, 3.3 V. ■ Guaranteed output current up to 5 A ■ Output tolerance ±1 % at 25 °C and ± 2 % in full
|
Original
|
PDF
|
KD1084AXX
KD1084AXX18
KD1084
KD1084AD2T18R
KD1084ADT-R
KD1084AXX
KD1084AXX18
|
ST2329AQTRQTR
Abstract: QFN10 ST2329A QFN-10
Text: ST2329A 2-bit dual supply level translator without direction control pin Features • 18 Mbps max. data rate when driven by a totem pole driver ■ 6.8 Mbps (max.) data rate when driven by an open drain pole driver ■ Bidirectional level translation without
|
Original
|
PDF
|
ST2329A
QFN10
ST2329AQTRQTR
QFN10
ST2329A
QFN-10
|
ST2349AQTR
Abstract: JESD97 QFN16L ST2349A
Text: ST2349A 4-bit dual supply level translator without direction control pin Preliminary Data Features • 90 Mbps max data rate when driven by a totem pole driver ■ 8 Mbps (max) data rate when driven by an open drain pole driver ■ Bi-directional level translation without
|
Original
|
PDF
|
ST2349A
QFN16
ST2349AQTR
JESD97
QFN16L
ST2349A
|
Untitled
Abstract: No abstract text available
Text: TLV5619ĆEP 2.7 V TO 5.5 V 12ĆBIT PARALLEL DIGITALĆTOĆANALOG CONVERTER WITH POWER DOWN ą SGLS124A − JULY 2002 − REVISED DECEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D D applications − One Assembly/Test Site, One Fabrication Site
|
Original
|
PDF
|
TLV5619EP
12BIT
SGLS124A
12-Bit
TMS320
|
Untitled
Abstract: No abstract text available
Text: SN65HVD50-SN65HVD55 www.ti.com SLLS666E – SEPTEMBER 2005 – REVISED OCTOBER 2009 HIGH OUTPUT FULL-DUPLEX RS-485 DRIVERS AND RECEIVERS Check for Samples :SN65HVD50-SN65HVD55 • • • • • • • • 1 1/8 Unit-Load Option Available (Up to 256 Nodes on the Bus)
|
Original
|
PDF
|
SN65HVD50-SN65HVD55
SLLS666E
RS-485
RS-422
RS485
SN65HVD30-35
SN65HVD53,
|
TPS75101
Abstract: TPS75133Q TPS75301 TPS75315 TPS75318 TPS75325 TPS75333 TPS75333Q
Text: TPS75101ĆEP, '75115ĆEP, '75118ĆEP, '75125ĆEP, '75133ĆEP WITH POWER GOOD TPS75301ĆEP, TPS75315ĆEP, TPS75318ĆEP, TPS75325ĆEP, TPS75333ĆEP WITH RESET FASTĆTRANSIENTĆRESPONSE 1.5ĆA LOWĆDROPOUT VOLTAGE REGULATORS SGLS158 − APRIL 2003 D Controlled Baseline
|
Original
|
PDF
|
TPS75101EP,
75115EP,
75118EP,
75125EP,
75133EP
TPS75301EP,
TPS75315EP,
TPS75318EP,
TPS75325EP,
TPS75333EP
TPS75101
TPS75133Q
TPS75301
TPS75315
TPS75318
TPS75325
TPS75333
TPS75333Q
|
SLMA002
Abstract: TPS75201M-EP TPS75201MPWPREP TSSOP-20
Text: TPS75201MĆEP FASTĆTRANSIENTĆRESPONSE 2ĆA LOWĆDROPOUT VOLTAGE REGULATOR WITH RESET SGLS325 − JANUARY 2006 D Controlled Baseline D D D D D D D D D 20-Pin TSSOP PWP PowerPAD Package − One Assembly/Test Site, One Fabrication D Thermal Shutdown Protection
|
Original
|
PDF
|
TPS75201MEP
SGLS325
20-Pin
100-ms
SLMA002
TPS75201M-EP
TPS75201MPWPREP
TSSOP-20
|
Untitled
Abstract: No abstract text available
Text: TLV5619ĆEP 2.7 V TO 5.5 V 12ĆBIT PARALLEL DIGITALĆTOĆANALOG CONVERTER WITH POWER DOWN ą SGLS124A − JULY 2002 − REVISED DECEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D D applications − One Assembly/Test Site, One Fabrication Site
|
Original
|
PDF
|
TLV5619Ä
SGLS124A
12-Bit
TMS320
|
Untitled
Abstract: No abstract text available
Text: ADS901 AD S 901 E SBAS054A – MAY 2001 10-Bit, 20MHz, +3V Supply ANALOG-TO-DIGITAL CONVERTER TM FEATURES DESCRIPTION ● LOW POWER: 48mW at +3V ● SUPPLY RANGE: +2.7V to +3.7V ● ADJUSTABLE FULL SCALE RANGE WITH EXTERNAL REFERENCES ● NO MISSING CODES
|
Original
|
PDF
|
ADS901
SBAS054A
10-Bit,
20MHz,
350MHz
SSOP-28
ADS901
10-bit
|
LM324N
Abstract: L324a
Text: LM124, LM124A, LM224, LM224A, LM324, LM324A, LM2902, LM2902V, LM224K, LM224KA, LM324K, LM324KA, LM2902K, LM2902KV, LM2902KAV QUADRUPLE OPERATIONAL AMPLIFIERS SLOS066S − SEPTEMBER 1975 − REVISED JULY 2008 D D D D D D description/ordering information These devices consist of four independent
|
Original
|
PDF
|
LM124,
LM124A,
LM224,
LM224A,
LM324,
LM324A,
LM2902,
LM2902V,
LM224K,
LM224KA,
LM324N
L324a
|
Untitled
Abstract: No abstract text available
Text: TLC139, TLC339, TLC339Q LinCMOS MICROPOWER QUAD COMPARATORS SLCS119B − DECEMBER 1986 − REVISED DECEMBER 2006 D Very Low Power . . . 200 µW Typ at 5 V D Fast Response Time . . . 2.5 µs Typ With D, J, N, OR PW PACKAGE TOP VIEW 5-mV Overdrive 1OUT
|
Original
|
PDF
|
TLC139,
TLC339,
TLC339Q
SLCS119B
TLC139M
TLC339M
TLC339C
TLC339I
TLC139/TLC339
|
|
|
Untitled
Abstract: No abstract text available
Text: TLV320AIC23B Stereo Audio CODEC, 8Ć to 96ĆkHz, With Integrated Headphone Amplifier Data Manual February 2004 Digital Audio Products SLWS106H IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications,
|
Original
|
PDF
|
TLV320AIC23B
96kHz,
SLWS106H
MTSS001C
4040064/F
MO-153
|
Untitled
Abstract: No abstract text available
Text: TL16C752B-EP 3.3 V DUAL UART WITH 64-BYTE FIFO www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 FEATURES 1 • • • • • • • • • • • • • • • • 1 Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an
|
Original
|
PDF
|
TL16C752B-EP
64-BYTE
SGLS153B
ST16C2550
24-MHz
48-MHz
|
Untitled
Abstract: No abstract text available
Text: SN54LVT8996, SN74LVT8996 3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS SCBS686A – APRIL 1997 – REVISED DECEMBER 1999 D D D D D D D D D D D D D Simple Addressing (Shadow) Protocol Is Received/Acknowledged on Primary TAP
|
Original
|
PDF
|
SN54LVT8996,
SN74LVT8996
10-BIT
SCBS686A
|
Untitled
Abstract: No abstract text available
Text: 74SSTUB32865A www.ti.com SLAS562 – NOVEMBER 2007 28-BIT TO 56-BIT REGISTERED BUFFER WITH ADDRESS-PARITY TEST FEATURES 1 • Member of the Texas Instruments Widebus+ Family • Pinout Optimizes DDR2 RDIMM PCB Layout • 1-to-2 Outputs Supports Stacked DDR2
|
Original
|
PDF
|
74SSTUB32865A
SLAS562
28-BIT
56-BIT
|
Untitled
Abstract: No abstract text available
Text: TPA2005D1 www.ti.com. SLOS369F – JULY 2002 – REVISED JULY 2008 1.4-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER
|
Original
|
PDF
|
TPA2005D1
SLOS369F
250-kHz
|
in4702
Abstract: INA117 INA117AM INA117BM INA117KU INA117P INA117SM OPA27 REF200 INA117PG4
Text: INA117 INA 117 INA 117 www.ti.com High Common-Mode Voltage DIFFERENCE AMPLIFIER FEATURES APPLICATIONS ● COMMON-MODE INPUT RANGE: ±200V VS = ±15V ● PROTECTED INPUTS: ±500V Common-Mode ±500V Differential ● UNITY GAIN: 0.02% Gain Error max ● NONLINEARITY: 0.001% max
|
Original
|
PDF
|
INA117
INA117
in4702
INA117AM
INA117BM
INA117KU
INA117P
INA117SM
OPA27
REF200
INA117PG4
|
Untitled
Abstract: No abstract text available
Text: TLV5619ĆEP 2.7 V TO 5.5 V 12ĆBIT PARALLEL DIGITALĆTOĆANALOG CONVERTER WITH POWER DOWN ą SGLS124A − JULY 2002 − REVISED DECEMBER 2003 D Controlled Baseline D D D D D D D D D D D D D D D applications − One Assembly/Test Site, One Fabrication Site
|
Original
|
PDF
|
TLV5619EP
12BIT
SGLS124A
12-Bit
TMS320
|
Untitled
Abstract: No abstract text available
Text: TLC1542ĆEP, TLC1543ĆEP 10ĆBIT ANALOGĆTOĆDIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 ANALOG INPUTS SGLS152A − JANUARY 2004 − REVISED FEBRUARY 2006 D Controlled Baseline D D D D D D D D D D D D D DW PACKAGE TOP VIEW − One Assembly/Test Site, One Fabrication
|
Original
|
PDF
|
TLC1542EP,
TLC1543EP
10BIT
SGLS152A
10-Bit
TLC542
|
Untitled
Abstract: No abstract text available
Text: SN65HVD50-SN65HVD55 www.ti.com SLLS666E – SEPTEMBER 2005 – REVISED OCTOBER 2009 HIGH OUTPUT FULL-DUPLEX RS-485 DRIVERS AND RECEIVERS Check for Samples :SN65HVD50-SN65HVD55 • • • • • • • • 1 1/8 Unit-Load Option Available (Up to 256 Nodes on the Bus)
|
Original
|
PDF
|
SN65HVD50-SN65HVD55
SLLS666E
RS-485
RS-422
RS485
SN65HVD30-35
|
wk 2 94v-0
Abstract: 4130 tyco
Text: 3 THIS DRAWING IS UNPUBLISHED. RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. COPYRIGHT L0C ALL RIGHTS RESERVED. REVISIONS DW LTR A1 P IC K PA D DATE DESCRIPTION DWN SC WK 16JUL08 REVISED ECR— 0 8 — 0 1 7 9 0 4 APVD D D - i -
|
OCR Scan
|
PDF
|
16JUL08
31MAR2000
wk 2 94v-0
4130 tyco
|