CL018G
Abstract: M1T1HT18PL64E 16Kx64 M1T1HT18PL32E fast sram 100mhz mosys sram embedded
Text: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PL64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late write mode timing • 64-Bit wide data buses
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M1T1HT18PL64E
64-Bit
CL018G
M1T1HT18PL64E
16Kx64
2200um
16Kx64
M1T1HT18PL32E
fast sram 100mhz
mosys sram embedded
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CL018G
Abstract: M1T1HT18PE64E Signal Technology 16Kx64
Text: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PE64E • High Speed 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Early write mode timing • 64-Bit wide data buses
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M1T1HT18PE64E
64-Bit
CL018G
M1T1HT18PE64E
Signal Technology
16Kx64
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CL018G
Abstract: M1T1HT18FL64E MoSys MoSys sram embedded
Text: High Speed Flow-through 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18FL64E • High Speed 1T-SRAM Standard Macro • 100 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 64-Bit wide data buses
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16Kx64)
M1T1HT18FL64E
64-Bit
CL018G
M1T1HT18FL64E
MoSys
MoSys sram embedded
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TSMC 0.25Um
Abstract: MOSYS M1T1HT25PZ32 M1T1HT25PZ64
Text: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT25PZ64 • High Speed 1T-SRAM Standard Macro • 166 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 64-Bit wide data buses
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16Kx64)
M1T1HT25PZ64
64-Bit
CL025G
M1T1HT25PZ64
TSMC 0.25Um
MOSYS
M1T1HT25PZ32
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M1T1HT25FL64
Abstract: No abstract text available
Text: High Speed Flow-through 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT25FL64 • High Speed 1T-SRAM Standard Macro • 83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 64-Bit wide data buses
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M1T1HT25FL64
64-Bit
CL025G
M1T1HT25FL64
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M1T1LT18FL64E
Abstract: CL018G M1T1LT18FL32E MoSys
Text: Low Power Flow-through 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1LT18FL64E • Low Power 1T-SRAM Standard Macro • 10-83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Late write mode timing • 64-Bit wide data buses
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M1T1LT18FL64E
64-Bit
CL018G
M1T1LT18FL64E
M1T1LT18FL32E
MoSys
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TSMC 0.18um
Abstract: CL018G M1T1LT18FE64E tsmc sram
Text: Low Power Flow-through 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1LT18FE64E • Low Power 1T-SRAM Standard Macro • 10-83 MHz operation • 1-Clock cycle time • Flow-through read access timing • Early write mode timing • 64-Bit wide data buses
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16Kx64)
M1T1LT18FE64E
64-Bit
CL018G
M1T1LT18FE64E
TSMC 0.18um
tsmc sram
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CL018G
Abstract: tsmc sram TSMC 0.18um SRAM TSMC 0.18um Process parameters M1T1HT18PL64E M1T1HT18PZ64E MoSys sram embedded MoSys 1T sram tsmc 0.18um
Text: High Speed Pipelined 1-Mbit 16Kx64 Standard 1T-SRAM Embedded Memory Macro M1T1HT18PZ64E • High Performance 1T-SRAM Standard Macro • 200 MHz operation • 1-Clock cycle time • Pipelined read access timing • Late-late write mode timing • 64-Bit wide data buses
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16Kx64)
M1T1HT18PZ64E
64-Bit
CL018G
M1T1HT18PZ64E
16Kx64
2200um
tsmc sram
TSMC 0.18um SRAM
TSMC 0.18um Process parameters
M1T1HT18PL64E
MoSys sram embedded
MoSys 1T sram
tsmc 0.18um
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NM6404
Abstract: 9698
Text: RESEARCH CENTER NeuroMatrix NM6404 DSP NeuroMatrix ® NM6404 is a high performance DSP oriented RISC processor designed for real time data flow processing. The architecture is based on advanced VLIW/SIMD NMC2 core and includes two main units: 32/64-bit RISC and patented
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NM6404
32/64-bit
64-bit
NM6404
28Gbyte/sec
60Mbyte/sec
32-bit
576-pin
9698
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82430FX
Abstract: CYM74B430 CYM74P430 CYM74P431 CYM74S430 CYM74S431 P54C ZENER A18 Burndy 75 74s430
Text: PRELIMINARY CYM74B430 CYM74P430/31 CYM74S430/31 Intel 82430FX PCIset Level II Cache Module Family Features D D Functional Description D PinĆcompatible secondary cache modĆ ule family that adheres to the Intel COAST 1.1 specification Ideal for Intel® P54CĆbased systems
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CYM74B430
CYM74P430/31
CYM74S430/31
82430FX
82430FX
CYM74B430)
CYM74P430,
CYM74P431)
CYM74S430,
CYM74S431)
CYM74B430
CYM74P430
CYM74P431
CYM74S430
CYM74S431
P54C
ZENER A18
Burndy 75
74s430
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82C693
Abstract: CY82C691 CY82C692 CY82C693 cy82
Text: ADVANCED INFORMATION D Features D D D PCI Bus Rev. 2.1 compliant Supports up to 5 additional PCI masters including the CY82C691 D Integrated DMA controllers with Type A, B, and F support. D D D D D Integrated Interrupt controllers Integrated timer/counters
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CY82C691
82C693
CY82C691
CY82C692
CY82C693
cy82
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at8989p
Abstract: 9-Port Fast Ethernet Repeater ATAN TECHNOLOGY TTL 7490 AT8989UP Tx/Fx Media Converter 400M 9-Port Fast Ethernet Switch serial parallel decoder nrzi circuit diagram MLT-3
Text: ATAN Technology, Inc. AT8989UP 9 port 10/100 Mb/s Single Chip Ethernet Switch Controller Preliminary Data Sheet Revision 1.1 Feb 2002 Revision 1.1 AT8989UP 9 port 10/100Mb/s Single Chip Switch Controller 1 ATAN Technology, Inc. Revision History Revision Date
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AT8989UP
AT8989UP
10/100Mb/s
April/2001
May/2001
ENDC16
0x12h
July/2001
0x10h
Aug/2001
at8989p
9-Port Fast Ethernet Repeater
ATAN TECHNOLOGY
TTL 7490
Tx/Fx Media Converter
400M
9-Port Fast Ethernet Switch
serial parallel decoder
nrzi circuit diagram MLT-3
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NM6405
Abstract: AMBA AXI ARM1176JZF-S NM6403 NM6404 ARM11 ARM1176 ARM1176 processor
Text: УДК 004.383.4 Система на кристалле 1879ХК1 для цифровой обработки аналоговых сигналов в радиотехнических системах и спутниковой навигации Д.Е. Косоруков, А.Л. Эйсымонт, В.Г. Осипов, А.П. Панфилов,
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ARM1176
ARM1176,
NM6403
NM6403
NM6405
AMBA AXI
ARM1176JZF-S
NM6404
ARM11
ARM1176
ARM1176 processor
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74P55
Abstract: LA17-LA5
Text: 1CY M74 SP5 4/55 CYM74BP54 CYM74P54/55 CYM74SP54/55 PRELIMINARY Intel 82430NX Chipset Level II Cache Module Family Features dustry standard 5V SRAMs and 3.3V level translators for CPU bus speeds up to 66 MHz. The CYM74BP54 is organized as 32K by 64-bits.
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CYM74BP54
CYM74P54/55
CYM74SP54/55
82430NX
CYM74BP54
64-bits.
CYM74BP54)
CYM74P54,
CYM74P55)
CYM74SP54,
74P55
LA17-LA5
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CY82C691
Abstract: bsram CY2254ASC-2 CY27C010 CY82C692 CY82C694 cy82 "programmable peripheral Interface" pentium amd cpu k5 4Kx64
Text: hCĆZX/hCĆVX/ ADVANCED INFORMATION hCĆDX Pentium t hyperCachetChipset Family System Features hCĆVX hCĆDX hCĆZX D Value solution with integrated 128ĆKB twoĆway set associative pipelined burst SRAM D Performance solution with 256ĆKB twoĆway set associative pipelined
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128KB
256KB
CY82C692
CY82C691
CY82C690
CY82C693/U
bsram
CY2254ASC-2
CY27C010
CY82C694
cy82
"programmable peripheral Interface" pentium
amd cpu k5
4Kx64
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1MD45
Abstract: cy17 High-Zt11-12 CY10 CY82C691 CY82C692 CY82C693 DQ23P cy82
Text: PRELIM INARY CY82C692 W CYPRESS Pentium hyperCache™ Chipset Data-Path Controller with Integrated Cache Features • Supports ail 3.3V Pentium™-class processors, AMD K5, K6 and Cyrix M1 CPUs • Two-bit wraparound counter supporting Intel Burst or Linear burst sequence
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CY82C692
CY82C691
CY82C693
64-bit
128-KB)
55fiTbbE
1MD45
cy17
High-Zt11-12
CY10
CY82C692
DQ23P
cy82
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY CY82C692 Pentium hyperCache™ Chipset Data-Path/Integrated Cache for h C -VX, h C -D X Solutions Features Two-bit wraparound counter supporting Intel Burst or Linear burst sequence Supports 3-1-1-1 Level 2 cache operation up to 66 MHz bus speed
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CY82C692
CY82C691
CY82C693
64-bit
128-KB)
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692CU
Abstract: 82c pci isa
Text: PRELIMINARY CY82C692 Pentium hyperCache™ Chipset Data-Path Controller with Integrated Cache Features • O n -C h ip 8-D ee p F IF O s s u p p o rt P o st-W ritin g /P re-R e ad ing PCI data • S u p p o rts all 3.3 V P e n tiu m ™ -c la s s p ro ces so rs , A M D
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CY82C692
CY82C
CY82C691
692CU
82c pci isa
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D1159
Abstract: ds 157
Text: PRELIMINARY CYM74B430 CYM74P430/31 CYM74S430/31 Intel 82430FX PCIset Level II Cache Module Family Features * 33V compatible inputs/data outputs • Pin-compatible secondary cache module family that adheres to the Intel COAST 1.1 specification • Asynchronous CYM74B430 , syn
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PDF
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CYM74B430
CYM74P430/31
CYM74S430/31
82430FX
CYM74B430)
CYM74P430,
CYM74P431)
CYM74S430,
CYM74S431)
P54C-based
D1159
ds 157
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PM-66C
Abstract: TIC 2460 82340 82430FX CYM74B430 CYM74P430 CYM74P431 CYM74S430 CYM74S431 74P431
Text: ^ S -;= i a g T n u n n rn r y L - Ï i PRELIMINARY n Lob = Intel 82340FX PCIset Level II Cache Module Family Features • Pin-compatible secondary cache m odulefam ily that ad heres to the Intel COAST 1.1 specification • Asynchronous CYM74B430 , synchronous pipelined
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PDF
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CYM74B430
CYM74P430/31
CYM74S430/31
82340FX
CYM74B430)
CYM74P430,
CYM74P431)
CYM74S430,
CYM74S431)
P54C-based
PM-66C
TIC 2460
82340
82430FX
CYM74B430
CYM74P430
CYM74P431
CYM74S430
CYM74S431
74P431
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82c691
Abstract: m040 m043 M046 CY10 CY2254ASC-2 CY27C010 CY82C691 CY82C693 cy82
Text: p - : : : îW j r y n n I? Q c I 1 i l l l D D PRELIMINARY CY82C690 Pentium hyperCache™ Chipset Data-Path/lntegrated Cache for hC-ZX Solution Features • Supports all 3.3V Pentium™ -class processors, AMD K5, and Cyrix M1 CPUs • Directly interfaces with CY82C691 and CY82C693 to
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CY82C690
CY82C691
CY82C693
64-bit
64-KB)
82c691
m040
m043
M046
CY10
CY2254ASC-2
CY27C010
cy82
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A5 GNC
Abstract: A1W 73 c877 A64A A1 GNC cym74sp55pm 82430NX CYM74BP54 CYM74P54 0/mosfet A5 GNC
Text: CYM74BP54 CYM74P54/55 CYM74SP54/55 æ r~ ^ S T •= • > y PRELIMINARY n u n n rn r L- Ï i n L o b = Intel 82430NX Chipset Level II Cache Module Family Features • Pin-compatible secondary cache module fam ily • Asynchronous CYM74BP54 , synchronous pipelined
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PDF
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CYM74BP54)
CYM74P54,
CYM74P55)
CYM74SP54,
CYM74SP55)
P54C-based
82430NX
160-position
CELP2X80SC3Z48
A5 GNC
A1W 73
c877
A64A
A1 GNC
cym74sp55pm
82430NX
CYM74BP54
CYM74P54
0/mosfet A5 GNC
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ADU01
Abstract: Intel P55 Chipset D31CD
Text: — ^ C Y M 7 4 B P 5 4 CYM 74P54/55 ^ l r t î m n r n P R E L IM IN A R Y . n wm W U ir K fc b b C Y M 7 4 S P 5 4 /5 5 — Intel 82430NX Chipset Level II Cache Module Family Feat ures • Pi n- compat i bl e secondary cache mo d ul e family • As yn ch r o no u s CYM7 4BP5 4 , sync h r o no us pipelined
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PDF
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74P54/55
82430NX
82430NX
160-position
ADU01
Intel P55 Chipset
D31CD
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Untitled
Abstract: No abstract text available
Text: CYPRESS CYM74BP54 CYM74P54/55 CYM74SP54/55 PRELIMINARY Features • Pin-compatible secondary cache m odule fam ily • Asynchronous CYM74BP54 , synchronous pipelined (CYM74P54, CYM74P55), or synchronous (CYM74SP54, CYM74SP55) configurations with pres ence and configuration detect pins
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CYM74BP54
CYM74P54/55
CYM74SP54/55
CYM74BP54)
CYM74P54,
CYM74P55)
CYM74SP54,
CYM74SP55)
P54C-based
82430NX
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