Untitled
Abstract: No abstract text available
Text: K7N803645M K7N801845M 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History Draft Date Remark 0.0 1. Initial document. September. 1997 Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz
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K7N803645M
K7N801845M
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
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K7n801845m
Abstract: No abstract text available
Text: K7N803645M K7N801845M 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History 1. Initial document. Draft Date September. 1997 Remark Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz 2. Changed DC Parameters;
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K7N803645M
K7N801845M
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
K7n801845m
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Untitled
Abstract: No abstract text available
Text: KM736S849 KM718S949 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History 1. Initial document. Draft Date September. 1997 Remark Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz 2. Changed DC Parameters;
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KM736S849
KM718S949
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
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PDF
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capacitor selection
Abstract: effect of parasitic in capacitors
Text: Application Bulletin AB-8 Power Supply Bypass Capacitor Selection Capacitor Selection Most of the energy in digital pulses lies in the area below Fknee, where: Fknee = 0.5 tr and tr is signal rise-time. For IsoLoop Isolators: Fknee = 0.5 = 167MHz 3 x10-9 This frequency may be considered the analog “bandwidth” of the device.
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167MHz
x10-9
ISB-AP-08;
capacitor selection
effect of parasitic in capacitors
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DSO751SR
Abstract: DSO321SR
Text: SMD Crystal Oscillators DSO221SR/DSO321SR/DSO531SR/DSO751SR •Features ● Low current consumption: 8mA max 167MHz, 3.3V ● Low voltage operation: 1.8V/2.5V/2.8V/3.3V ● Offers Narrow deviation: ±20x10−6/±30×10−6/±50×10−6/±100×10−6 ● Available up to 167MHz by using AT cut fundamental
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DSO221SR/DSO321SR/DSO531SR/DSO751SR
167MHz,
167MHz
815mm
DSO221SR)
DSO321SR/DSO531SR)
DSO751SR)
DSO221SR
DSO321SR
DSO531SR
DSO751SR
DSO321SR
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Untitled
Abstract: No abstract text available
Text: KM736S849 KM718S949 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History Draft Date Remark 0.0 1. Initial document. September. 1997 Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz 2. Changed DC Parameters;
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Original
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KM736S849
KM718S949
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
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PDF
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Untitled
Abstract: No abstract text available
Text: SMD Crystal Oscillators DSO221SR/DSO321SR/DSO531SR/DSO751SR •Features ● Low current consumption: 8mA max 167MHz, 3.3V ● Low voltage operation: 1.8V/2.5V/2.8V/3.3V ● Offers Narrow deviation: ±20x10−6/±30×10−6/±50×10−6/±100×10−6 ● Available up to 167MHz by using AT cut fundamental
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DSO221SR/DSO321SR/DSO531SR/DSO751SR
167MHz,
167MHz
815mm
DSO221SR)
DSO321SR/DSO531SR)
DSO751SR)
DSO221SR
DSO531SR
DSO321SR
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50REF
Abstract: No abstract text available
Text: KM736S849 KM718S949 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History Draft Date Remark 0.0 1. Initial document. September. 1997 Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz 2. Changed DC Parameters;
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KM736S849
KM718S949
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
50REF
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PDF
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No Turnaround RAM
Abstract: No abstract text available
Text: KM736S849 KM718S949 PRELIMINARY 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial document. September. 1997 Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz
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KM736S849
KM718S949
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
No Turnaround RAM
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PDF
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K7N801845M
Abstract: K7N803645M
Text: K7N803645M K7N801845M 256Kx36 & 512Kx18 Pipelined NtRAMTM Document Title 256Kx36 & 512Kx18-Bit Pipelined NtRAM TM Revision History History 1. Initial document. Draft Date September. 1997 Remark Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz 2. Changed DC Parameters;
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K7N803645M
K7N801845M
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
400mA
450mA
K7N801845M
K7N803645M
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PDF
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SME2411BGA-66
Abstract: X1059A SEU1L-170-0 PCMCIA SRAM Memory Card 512k SPEC95 STP1080ABGA100 Sun Ultra AX STP1030ABGA167 STP3010PGA STP2024QFP
Text: P roduct line Card SPARC Processors Processor Part Number Speed SPEC95 int/fp UltraSPARC-I STP1030ABGA-167 167MHz 7.1/11.0 STP1030ABGA-200 200MHz 8.4/12.8 STP1080ABGA-83 83MHz N/A STP1080ABGA-100 100MHz N/A SME1040BGA-266 266MHz 9.9/12.6 est. SME1040BGA-300
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SPEC95
STP1030ABGA-167
167MHz
STP1030ABGA-200
200MHz
STP1080ABGA-83
83MHz
STP1080ABGA-100
100MHz
SME1040BGA-266
SME2411BGA-66
X1059A
SEU1L-170-0
PCMCIA SRAM Memory Card 512k
STP1080ABGA100
Sun Ultra AX
STP1030ABGA167
STP3010PGA
STP2024QFP
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Untitled
Abstract: No abstract text available
Text: ADS809 ADS 809 www.ti.com 12-Bit, 80MHz Sampling ANALOG-TO-DIGITAL CONVERTER TM FEATURES DESCRIPTION ● DYNAMIC RANGE: SNR: 65dB at 10MHz fIN SFDR: 68dB at 10MHz fIN The ADS809 is a high-dynamic range 12-bit, 80MHz pipelined Analog-to-Digital A/D converter. It includes a
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ADS809
12-Bit,
80MHz
10MHz
ADS809
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C6701
Abstract: No abstract text available
Text: TMS320C6701 FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR SPRS067E – MAY 1998 – REVISED MAY 2000 D Highest Performance Floating-Point Digital D D D D D Signal Processor DSP TMS320C6701 – 8.3-, 6.7-, 6-ns Instruction Cycle Time – 120-, 150-, 167-MHz Clock Rate
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TMS320C6701
SPRS067E
TMS320C6701
167-MHz
32-Bit
TMS320C6201
C6701
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RJP 30 h1
Abstract: No abstract text available
Text: TMS320C6713B FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR SPRS294A − OCTOBER 2005 − REVISED NOVEMBER 2005 D Highest-Performance Floating-Point Digital D D D D D D Signal Processor DSP : TMS320C6713B − Eight 32-Bit Instructions/Cycle − 32/64-Bit Data Word
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TMS320C6713B
SPRS294A
32-Bit
32/64-Bit
200-MHz
167-MHz
TMS320C67x
RJP 30 h1
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bzx 850
Abstract: bzx 850 30
Text: CY7C1412AV18 CY7C1414AV18 36 Mbit QDR II SRAM Two Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ 2-word burst on all accesses
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CY7C1412AV18
CY7C1414AV18
CY7C1412AV18,
CY7C1414AV18
bzx 850
bzx 850 30
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C6000
Abstract: TMS320C6000 TMS320C6411
Text: TMS320C6411 FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SPRS196I − MARCH 2002 − REVISED JUNE 2005 D Low-Cost, High-Performance Fixed-Point D D D D DSP − TMS320C6411 − 3.33-ns Instruction Cycle Time − 300-MHz Clock Rate − Eight 32-Bit Instructions/Cycle
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TMS320C6411
SPRS196I
33-ns
300-MHz
32-Bit
TMS320C62x
TMS320C64x
32-/40-Bit)
32-Bit,
C6000
TMS320C6000
TMS320C6411
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9l reset
Abstract: CY7C0852V-133AC CY7C09289V CY7C09369V CY7C09379V
Text: CY7C093794V CY7C093894V CY7C09289V CY7C09369V CY7C09379V CY7C09389V3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM CY7C0851V/CY7C0852V CY7C0831V/CY7C0832V 3.3V 64K/128K x 36 and 128K/256K x 18 Synchronous Dual-Port RAM Features Functional Description
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CY7C093794V
CY7C093894V
CY7C09289V
CY7C09369V
CY7C09379V
CY7C09389V3
64K/128K
128K/256K
CY7C0851V/CY7C0852V
CY7C0831V/CY7C0832V
9l reset
CY7C0852V-133AC
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K7A323600M
Abstract: K7B321825M-QC65 K7A321800M
Text: K7A323600M K7A321800M 1Mx36 & 2Mx18 Synchronous SRAM Document Title 1Mx36 & 2Mx18-Bit Synchronous Pipelined Burst SRAM Revision History Rev. No. History Draft Date Remark 0.0 1. Initial draft May. 10. 2001 Advance 0.1 1. Add 165FBGA package Aug. 29. 2001 Preliminary
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K7A323600M
K7A321800M
1Mx36
2Mx18
2Mx18-Bit
165FBGA
K7A3236
165FBGA
K7A323600M
K7B321825M-QC65
K7A321800M
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ZZ 160 ITT
Abstract: 36/ZZ 160 ITT
Text: KM736S849 KM718S949 PRELIMINARY 256Kx36 & 512Kx18 Pipelined NfRAM Document Title 256KX36 & 512Kx18-Bit Pipelined NfRAM™ Revision Historv R ev. No. H isto rv Draft Date R em ark 0.0 1. Initial document. September. 1997 Prelim inary 0.1 1. Changed speed bin from 167MHz to 150MHz
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KM736S849
KM718S949
256Kx36
512Kx18
512Kx18-Bit
167MHz
150MHz
150MHz
167MHz
ZZ 160 ITT
36/ZZ 160 ITT
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PDF
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84154
Abstract: CY37128P84-125JI
Text: fax id: 6146 Ultra371 28 UltraLogic 128-Macrocell ISR™ CPLD High speed Feat u res - W x = • 128 m acrocells in eight logic blocks 167MHz — tpo = 6.5 ns • In-System R e p ro g ra m m ab le ISR™ — ts = 3.5 ns — JTAG com plia nt on board p rogram m in g
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Ultra371
128-Macrocell
167MHz
84154
CY37128P84-125JI
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PDF
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Untitled
Abstract: No abstract text available
Text: KM736S849 KM718S949 PRELIMINARY 256Kx36 & 512Kx18 Pipelined NfRAM Document Title 256KX36 & 512Kx18-Bit Pipelined NfRAM™ Revision History Rev. No. Historv Draft Date Remark 0.0 1. Initial document. September. 1997 Prelim inary 0.1 1. Changed speed bin from 167MHz to 150MHz
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KM736S849
KM718S949
256KX36
512Kx18
512Kx18-Bit
167MHz
150MHz
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PDF
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Untitled
Abstract: No abstract text available
Text: KM736S849 KM718S949 256Kx36 & 512KX18 Pipelined NfRAM D o c u m e n t T itle 256Kx36 R e v is io n & 512Kx18-Bit Pipelined NfRAM™ H is io r v Historv Draft Date Remark 0.0 1. Initial document. September. 1997 Preliminary 0.1 1. Changed speed bin from 167MHz to 150MHz
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KM736S849
KM718S949
256Kx36
512KX18
512Kx18-Bit
167MHz
150MHz
150MHz
167MHz
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PDF
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ee94
Abstract: No abstract text available
Text: CRYSTAL CONTROLLED ran OSCILLATORS SURFACE MOUNT 3.3V PECL AURORA, IL 60505 PHONE 6 3 0 8 5 1 -4 7 2 2 FAX (63 0) 8 5 1 -5 0 4 0 www.conwin.com CONNOR W IN F IE L D EE94—51* SPECIFICATIONS Frequency Range E E 94-52* 13MHz to 167MHz 13MHz to 200MHz ±25ppm
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EE94-52*
EE94-53*
EE94-54*
13MHz
167MHz
200MHz
167MHz
25ppm
ee94
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PDF
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LQFP-100
Abstract: No abstract text available
Text: TOSHIBA TC55WD1618FF-133,-150,-167 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TENTATIVE SILICON GATE CMOS 1,048,576-WORD BY 18-BIT SYNCHRONOUS NO-TURNAROUND STATIC RAM DESCRIPTION The TC55WD1618FF is a synchronous static random access memory SRAM organized as 1,048,576 words by
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TC55WD1618FF-133
TC55WD1618FF
LQFP100-P-1420-0
LQFP-100
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