Untitled
Abstract: No abstract text available
Text: LeadFree a P ckage Options Available! ispLSI 2128/A In-System Programmable High Density PLD Features Functional Block Diagram • ENHANCEMENTS fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay • IN-SYSTEM PROGRAMMABLE D0 C7 A1 ES
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2128/A
OuLTN176
176-Pin
128A-80LQN160
160-Pin
128A-80LTN176
128A-80LTN176I
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XC3030-70PC84C
Abstract: EPM5128LC EP330PC-15 A1020 transistor A1010B-PL68C EPM5128GM EP330PC15 EP330PC XC3042-70PC84C A1020A-PL84C
Text: ULCt Cross-Reference Matra MHS Cross reference list of devices supported for ULC conversion is not exhaustiv as new devices are added regularly. Additional devices not shown in this list, may also be supported. MHS encourages you to contact your local TEMIC sales representative
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A1010A-PL44C
A1010B-PL44C
ULC/A1010
44-PLCC
A1010A-PL44I
A1010B-PL44I
A1010A-1PL44C
A1010B-1PL44C
A1020A-1PL44C
XC3030-70PC84C
EPM5128LC
EP330PC-15
A1020 transistor
A1010B-PL68C
EPM5128GM
EP330PC15
EP330PC
XC3042-70PC84C
A1020A-PL84C
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ispLSI 3256A
Abstract: No abstract text available
Text: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable
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0212/3256A
256A-90LM*
160-Pin
256A-90LQ
256A-70LM*
256A-70LQ
256A-50LM*
ispLSI 3256A
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teradyne z1890
Abstract: Sis 968 ispMACH 4000 development circuit gal amd 22v10 22v10 pal gal programming 22v10 Pal programming 22v10 272-BGA GAL programming PALCE* programming
Text: L A T T I C E S E M I C O N D U C T Programmable Logic Devices O R “A vision of the ultimate system — Lattice provides the tools and analog, digital, and everything in support necessary to utilize each between, instantly re-programmable.” of these building blocks. The
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I0107A
teradyne z1890
Sis 968
ispMACH 4000 development circuit
gal amd 22v10
22v10 pal
gal programming 22v10
Pal programming 22v10
272-BGA
GAL programming
PALCE* programming
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Integrated Development System
Abstract: puretech AT40K AT40KAL ATDH40M ATDM2100PC ATDM2100SN ATDS2100PC ATDS2100SN verilog code for routing table
Text: Contents Atmel FPGA Integrated Development System IDS contains the following items: • IDS Installation Guide • CD-ROM containing all necessary software and online documents Features • • • • • • • • • • • • • • • • •
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AT40K/AT40KAL
AT6000
AT40K
AT6000
1421D
06/01/xM
Integrated Development System
puretech
AT40KAL
ATDH40M
ATDM2100PC
ATDM2100SN
ATDS2100PC
ATDS2100SN
verilog code for routing table
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100-PIN TQFP XILINX DIMENSION
Abstract: xilinx xc9536 digital clock xc9536-pc44 XC95216XL xc95144 pin diagram XC95108XL XC9536 XC95144 XC9500 pinout XC9536XL Series
Text: Ann Duft Xilinx, Inc. 408 879-4726 publicrelations@xilinx.com Kathy Keller Oak Ridge Public Relations (408) 253-5042 kathy.keller@oakridge.com FOR IMMEDIATE RELEASE XILINX ANNOUNCES NEWEST MEMBER OF INDUSTRY’S FASTEST GROWING CPLD FAMILY New XC95144 device targets sweet spot of ISP CPLD market with lowest price per macrocell
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XC95144
1998--Xilinx,
XC9500
100-PIN TQFP XILINX DIMENSION
xilinx xc9536 digital clock
xc9536-pc44
XC95216XL
xc95144 pin diagram
XC95108XL
XC9536
XC9500 pinout
XC9536XL Series
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pal 007c
Abstract: b1100 nec LDP16 sulzer s7 7-segment countdown timer MDP36 100LQ128 3pin round shell connector DP83932B LT1084CT-3.3
Text: MiniRISC BDMR4011 Evaluation Board User’s Guide A CoreWare® Product March 1998 ® Order Number XXXXX Document DB15-000055-00, First Edition March 1998 This document describes revision A of LSI Logic Corporation’s BDMR4011 Evaluation Board and will remain the official reference source for all revisions/releases of this product until rescinded by an update.
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BDMR4011
DB15-000055-00,
respons3580
pal 007c
b1100 nec
LDP16
sulzer s7
7-segment countdown timer
MDP36
100LQ128
3pin round shell connector
DP83932B
LT1084CT-3.3
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80486 System Software Writers Guide
Abstract: 0311 sdf sun SPARC 50 ATDM2160HP 3300 XL synopsys Platform Architect DataSheet ATDS2160SN AT40K ATDM2100PC ATDM2100SN
Text: Contents Atmel FPGA Integrated Development System IDS contains the following items – materials delivered may vary based on the products ordered: • IDS Installation Guide • CD-ROM containing all necessary software and online documents • Security block (for Viewlogic PC installations if ordered)
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AT40K
AT6000
AT6000
10/99/xM
80486 System Software Writers Guide
0311 sdf
sun SPARC 50
ATDM2160HP
3300 XL
synopsys Platform Architect DataSheet
ATDS2160SN
ATDM2100PC
ATDM2100SN
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K614
Abstract: 2128VE
Text: ispLSI 2128VE 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram* • 3.3V LOW VOLTAGE 2128 ARCHITECTURE — Interfaces with Standard 5V TTL Devices • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 250MHz Maximum Operating Frequency
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2128VE
250MHz
2128VE-135LB208
208-Ball
2128VE-135LT100
100-Pin
2128VE-135LB100
100-Ball
2128VE-100LT176
176-Pin
K614
2128VE
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5v rs232 UART interface
Abstract: db9 rs232 socket RS232 DB9 DB9 rs232 5V RS422 USB db25 usb 16-DRAM RS530 xcvr 256K X 16
Text: Am186TMCC/CH/CU Customer Development Platform Main Board Memory Interface Expansion Interface 256K x 16 SRAM SRAM/ICE Socket Am186 Expansion Bank 1 256K x 16 DRAM SRAM/ICE Socket Bank 0 256K x 16 DRAM 1 MByte Flash Memory Am186 Expansion Development Module
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Am186TMCC/CH/CU
Am186
RS422
RS530
160-PQFP
5v rs232 UART interface
db9 rs232 socket
RS232 DB9
DB9 rs232
5V RS422 USB
db25 usb
16-DRAM
xcvr
256K X 16
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Untitled
Abstract: No abstract text available
Text: ispLSI 2128V 3.3V High Density Programmable Logic Features Functional Block Diagram* • HIGH DENSITY PROGRAMMABLE LOGIC 2 Output Routing Pool ORP — Interfaces with Standard 5V TTL Devices — The 128 I/O Pin Version is Fuse Map Compatible with 5V ispLSI 2128
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176-Pin
128V-80LQ160
160-Pin
128V-80LT100
100-Pin
128V-80LJ84
84-Pin
128V-60LT176
128V-60LQ160
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2128-80LT
Abstract: No abstract text available
Text: ® ispLSI and pLSI 2128 High-Density Programmable Logic Functional Block Diagram Output Routing Pool ORP Output Routing Pool (ORP) D7 D3 D5 fmax = 100 MHz Maximum Operating Frequency tpd = 10 ns Propagation Delay TTL Compatible Inputs and Outputs Electrically Erasable and Reprogrammable
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PB1091
Abstract: No abstract text available
Text: Product Bulletin February 1998 #PB1091 Lattice ispLSI 2000V Family Delivers 3.3V for Free!! Introduction When should you begin designing with 3.3V PLDs? Right NOW!! Lattice has eliminated all price premiums associated with it’s 3.3V ispLSI 2000V family of PLDs,
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PB1091
1-888-ISP-PLDS
PB1091
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622-MHz
Abstract: No abstract text available
Text: VITESSE SEMICONDUCTOR CORPORATION Advance Product Information 2.488Gb/s SONET/SDH STS-48/STM-16 Section Terminator VSC8151 Features • Integrated 2.488Gb/s Transceiver • Support for Multiple SONET/SDH Rates • SONET/SDH Transport Overhead Output • LOF/SEF Alarm Generation
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VSC8151
488Gb/s
STS-48/STM-16
VSC8151
G52225-0,
622-MHz
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Untitled
Abstract: No abstract text available
Text: ispLSI 3256A In-System Programmable High Density PLD Functional Block Diagram • HIGH-PERFORMANCE E CMOS TECHNOLOGY — fmax = 90 MHz Maximum Operating Frequency — tpd = 12 ns Propagation Delay — TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammable
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0212/3256A
256A-90LM*
256A-90LQ
256A-70LM*
256A-70LQ
256A-50LM*
160-Pin
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VSC8151
Abstract: GR-253 J0 byte length 14 GR-253 VSC8122 VSC812X HF-62
Text: VITESSE SEMICONDUCTOR CORPORATION Advance Product Information 2.488Gb/s SONET/SDH STS-48/STM-16 Section Terminator VSC8151 Features • Integrated 2.488Gb/s Transceiver • Support for Multiple SONET/SDH Rates • SONET/SDH Transport Overhead Output • LOF/SEF Alarm Generation
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488Gb/s
STS-48/STM-16
VSC8151
VSC8151
G52225-0,
GR-253 J0 byte length 14
GR-253
VSC8122
VSC812X
HF-62
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2128VE
Abstract: No abstract text available
Text: ispLSI 2128VE 3.3V In-System Programmable SuperFAST High Density PLD Functional Block Diagram* • 3.3V LOW VOLTAGE 2128 ARCHITECTURE — Interfaces with Standard 5V TTL Devices • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — fmax = 250MHz Maximum Operating Frequency
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2128VE
250MHz
2128VE-135LT100
100-Pin
2128VE-135LB100
100-Ball
2128VE-100LT176
176-Pin
2128VE-100LQ160
160-Pin
2128VE
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Sw 2604
Abstract: 16kx8 static ram ttl 79r4600 4Kx8 Dual-Port Static RAM 4Kx4 SRAM 49c402 4kx8 sram SW 2603 sem 3040 ram 6116
Text: As of 10/10/95 Page 1 Product Selector Guide RISC Microprocessors and Embedded Control Products Product Product Description 32-bit RISC CPUs Speeds Pkgs Temp Volt Cache Other Data Doc ID Avail Speeds Pkgs Temp Volt Cache Other Data Doc ID Avail Support Chips for 32-bit CPUs
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32-bit
79R3715
R30xx
33MHz
160PQFP
R3041
R3081
R3052E
Sw 2604
16kx8 static ram ttl
79r4600
4Kx8 Dual-Port Static RAM
4Kx4 SRAM
49c402
4kx8 sram
SW 2603
sem 3040
ram 6116
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16kx8 static ram ttl
Abstract: 1K x 8 static ram 6116 RAM SRAM 6116 ram 6116 29FCT520 c 3198 transistor MQUAD 72125 8kx9 sram
Text: As of 9/28/95 Page 1 Alpha-Numeric List of Products Product 10474 10480 10484 10490 10494 10504 10A474 10A484 10B484 29FCT2052 29FCT52 29FCT520 29FCT520T 29FCT521T 29FCT52T 29FCT53 29FCT53T 49C3466 49C402 49C460 49C465 49C466 49FCT3805 49FCT805 49FCT805T 49FCT806
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10A474
10A484
10B484
29FCT2052
29FCT52
29FCT520
29FCT520T
29FCT521T
29FCT52T
29FCT53
16kx8 static ram ttl
1K x 8 static ram
6116 RAM
SRAM 6116
ram 6116
29FCT520
c 3198 transistor
MQUAD
72125
8kx9 sram
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Untitled
Abstract: No abstract text available
Text: The ARM Processor Family This Data Sheet is one of a series describing the ARM Family of products from GEC Plessey Semiconductors. The table below shows the current range of 32-bit RISC M icroprocessors/M icrocontrollers. GPS Name P ackag e Description 32 bit RISC core with 32 bit address range.
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32-bit
100PQFP
144TQFP
160PQFP
ser26
FIQ26
1RQ26
upervisor26.
37bfl522
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OA2222L
Abstract: XN2222 025x
Text: SEMICONDUCTOR CORPORATION Data Sheet High Performance GLX Family Low Power GaAs Gate Arrays Features • Sea-of-Gates Core Low-Power Macros Available • Five Array Sizes: 15K, 40K, 80K, 120K and 220K Raw Gates Standard TTL, LVTTL, ECL, LVPECL, GTL, HSTL and LVDS I/O Compatibility
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110nW
G52144-0,
OA2222L
XN2222
025x
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY BEYOND PERFORMANCE VANTI S VF1 FIELD PROGRAMMABLE GATE ARRAY FEATURES AND BENEFITS ♦ The industry's first Variable-Grain-Architecture enables high-density, high-performance designs for a wide range of applications — Architecture adapts to logic to enable synthesis-friendly, high-performance designs
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CPI-2M-6/98-1
2106A
1-888-VANTIS2
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smd diode code a6I
Abstract: A1s smd TRANSISTOR 4c7 SMD grid tie inverters circuit diagrams ATT3000 grid tie inverter schematics n993 smd transistor A1s ATT3020 ATT3042
Text: Data Sheet October 1993 -— s u A T « T — M l * Microelectronics ATT3000 Series Field-Programmable Gate Arrays -50, -70, -100, -125, and -150 MHz Features Description • High performance—up to 150 MHz toggle rates The CMOS ATT3000 Series Field-Programmable Gate
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ATT3000
XC3000*
ATT3090
00s002t>
smd diode code a6I
A1s smd TRANSISTOR
4c7 SMD
grid tie inverters circuit diagrams
grid tie inverter schematics
n993
smd transistor A1s
ATT3020
ATT3042
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2SJ 6810
Abstract: 2sj 6815 ISP 22V10 mach211sp MACH2115P 29m16
Text: 0 v > I u i s.11- Vantis Device Selector Guide I BEYO N D PERFO RM A N TE MACH 4 FAMILY Table 1. MACH 4 Devices1 Commercial Device Package Macrocetls (PLD Gates 1/0$ Dedicated Inputs Output Enables PT per Output FItp- JTAG(w/NO speed adder) Flops ISP troiis
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-128N/64-7
-128N/64-iO
-128N/64-12
-128N/64-15
LVH28/64-10
-2S6/128-12
208PQFP
256BGA
144TQFP
PALCE16V8,
2SJ 6810
2sj 6815
ISP 22V10
mach211sp
MACH2115P
29m16
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