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    "sense amplifier" voltage control current precharge memory

    Abstract: No abstract text available
    Text: Application 2. Dynamic RAM DRAM 2.1 Features of DRAM DRAM has a simple two-element memory structure, consisting o f a single transistor and a single capacitor. Due to this feature, DRAM is suitable for a higher degree of chip integration and can implement low-price


    OCR Scan     		PDF 25MHz) 40MHz) 15nsi 66MHz) "sense amplifier" voltage control current precharge memory

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    Abstract: No abstract text available
    Text: IBM0116400 IBM0116400M IBM0116400B IBM0116400P 4M x 4 12/10 DRAM Features • Low Power Dissipation - Active max - 85 mA / 75 mA / 65 mA - Standby: TTL Inputs (max) - 2.0 mA - Standby: C M O S Inputs (max) - 1.0 mA (SP version) - 0.2 mA (LP version) - Self Refresh (LP version only)


    OCR Scan     		PDF IBM0116400 IBM0116400M IBM0116400B IBM0116400P

    Untitled

    Abstract: No abstract text available
    Text: IBM0116405 IBM0116405M IBM0116405B IBM0116405P 4M x 4 12/10 EDO DRAM Features • Low Power Dissipation - Active max - 90 mA / 75 mA / 65 mA - Standby: TTL Inputs (max) -1.0 mA - Standby: CMOS Inputs (max) - 1.0 mA (SP version) - 0.2 mA (LP version) - Self Refresh (LP version only)


    OCR Scan     		PDF IBM0116405 IBM0116405M IBM0116405B IBM0116405P