JEDEC SPD No.21
Abstract: JEP106 001N
Text: JEDEC Standard No. 21–C Page 4.1.2.4 – 1 4.1.2.4 – Appendix D: DDR Synchronous DRAM DDR SDRAM 1 – Introduction This application note fully describes the Serial Presence Detect assignments for SPD used on Double Data Rate Synchronous DRAM Modules. All unused entries will be coded as 00h or FFh. All unused
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13M32734BCD-260Y
31334D33323733344243442D323630592020
JEDEC SPD No.21
JEP106
001N
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Untitled
Abstract: No abstract text available
Text: =• = 13M32734BCD Preliminary 32M x 72 2-Bank Registered/Buffered SDRAM Module Features • 168-Pin Registered 8-Byte Dual In-Line Memory Module • 32Mx72 Synchronous DRAM DIMM • Performance: i -2 6 0 ,-3 6 0 | Reg. i Buff. ; Reg. ! Buff DIMM CAS Latency
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IBM13M32734BCD
168-Pin
32Mx72
66/100MHz
PC100
13M32734BCD
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Untitled
Abstract: No abstract text available
Text: 13M32734BCD 32M X 72 2-Bank R egistered/Buffered SDRAM M odule Features • 168-Pin Registered 8-Byte Dual In-Line Memory Module • 32Mx72 Synchronous DRAM DIMM • Performance: 1n I -260,-360 I | PC100 I Units! Reg. I Buff. Reg. ! Buff DIMM CAS Latency
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OCR Scan
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PDF
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IBM13M32734BCD
168-Pin
32Mx72
PC100)
66/100MHz
PC100
|
Untitled
Abstract: No abstract text available
Text: 13M32734BCD Preliminary 32M x 72 2-Bank Registered/Buffered SDRAM Module Features • 168-Pin Registered 8-Byte Dual In-Line Memory Module • 32Mx72 Synchronous DRAM DIMM • Performance: -1I0 DIMM CAS Latency jfcK Clock Frequency | PC100 I Units Reg. | Buff. ! Re9 ; Buff
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OCR Scan
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PDF
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IBM13M32734BCD
168-Pin
32Mx72
PC100)
66/100MHz
PC100
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