Si7308DN
Abstract: No abstract text available
Text: SPICE Device Model Si7308DN Vishay Siliconix N-Channel 60-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Model Subcircuit) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si7308DN
S-51113Rev.
13-Jun-05
|
Si7818DN
Abstract: si7818
Text: Si7818DN New Product Vishay Siliconix N-Channel 150-V D-S MOSFET FEATURES PRODUCT SUMMARY VDS (V) 150 rDS(on) (W) ID (A) 0.135 @ VGS = 10 V 3.4 0.142 @ VGS = 6 V 3.3 Qg(Typ) 20 nC D PWM-Optimized TrenchFETr Power MOSFET D 100% Rg Tested D Avalanche Tested
|
Original
|
PDF
|
Si7818DN
Si7818DN-T1--E3
08-Apr-05
si7818
|
Si7421DN
Abstract: Si7421DN-T1
Text: Si7421DN Vishay Siliconix P-Channel 30-V D-S MOSFET FEATURES PRODUCT SUMMARY VDS (V) −30 rDS(on) (W) ID (A) 0.025 @ VGS = −10 V −9.8 0.043 @ VGS = −4.5 V −7.4 D TrenchFETr Power MOSFET D New PowerPAKr Package − Low Thermal Resistance, RthJC − Low 1.07-mm Profile
|
Original
|
PDF
|
Si7421DN
07-mm
Si7421DN-T1--E3
08-Apr-05
Si7421DN-T1
|
Untitled
Abstract: No abstract text available
Text: SiE822DF Vishay Siliconix N-Channel 20-V D-S MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET Power MOSFET • Ultra Low Thermal Resistance Using TopExposed PolarPAK® Package for DoubleSided Cooling
|
Original
|
PDF
|
SiE822DF
2002/95/EC
2011/65/EU
2002/95/EC.
2002/95/EC
2011/65/EU.
12-Mar-12
|
Untitled
Abstract: No abstract text available
Text: Si7220DN Vishay Siliconix Dual N-Channel 60-V D-S MOSFET FEATURES PRODUCT SUMMARY VDS (V) 60 rDS(on) (W) ID (A) 0.060 @ VGS = 10 V 4.8 0.075 @ VGS = 4.5 V 4.3 Qg (Typ) 13 D TrenchFETr Power MOSFET D New Low Thermal Resistance PowerPAKr Package, 1/3 the Space
|
Original
|
PDF
|
Si7220DN
Si7220DN-T1--E3
18-Jul-08
|
Untitled
Abstract: No abstract text available
Text: SiE830DF Vishay Siliconix N-Channel 30-V D-S MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 Definition • Extremely Low Qgd WFET Technology for Low Switching Losses • Ultra Low Thermal Resistance Using TopExposed PolarPAK® Package for DoubleSided Cooling
|
Original
|
PDF
|
SiE830DF
2002/95/EC
2011/65/EU
2002/95/EC.
2002/95/EC
2011/65/EU.
12-Mar-12
|
Si4430BDY
Abstract: A18280
Text: SPICE Device Model Si4430BDY Vishay Siliconix N-Channel 30-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4430BDY
18-Jul-08
A18280
|
SIP41109DY-T1-E3
Abstract: SiP41109 SiP41109DB SiP41110 SiP41110DB
Text: SiP41109/41110 New Product Vishay Siliconix Half-Bridge N-Channel MOSFET Driver for DC/DC Conversion FEATURES D D D D D D D D D APPLICATIONS PWM With Tri-State Enable 12-V Low-Side Gate Drive SiP41109 8-V Low-Side Gate Drive (SiP41110) Undervoltage Lockout
|
Original
|
PDF
|
SiP41109/41110
SiP41109
SiP41110
30-ns
18-Jul-08
SIP41109DY-T1-E3
SiP41109DB
SiP41110DB
|
Si4413DY
Abstract: No abstract text available
Text: SPICE Device Model Si4413DY Vishay Siliconix P-Channel 30-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4413DY
18-Jul-08
|
Si4401DY
Abstract: No abstract text available
Text: SPICE Device Model Si4401DY Vishay Siliconix P-Channel 40-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4401DY
18-Jul-08
|
72741
Abstract: Integrated Circuit 72741 72741 B Si4473BDY
Text: SPICE Device Model Si4473BDY Vishay Siliconix P-Channel 14-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4473BDY
18-Jul-08
72741
Integrated Circuit 72741
72741 B
|
Si7422DN-T1
Abstract: No abstract text available
Text: Si7422DN Vishay Siliconix N-Channel 20-V D-S Fast Switching MOSFET FEATURES PRODUCT SUMMARY VDS (V) 20 rDS(on) (W) ID (A) 0.0061 @ VGS = 10 V 20.3 0.0077 @ VGS = 4.5 V 18.1 D TrenchFETr Power MOSFET D New Low Thermal Resistance PowerPAKr Package with Low 1.07-mm Profile
|
Original
|
PDF
|
Si7422DN
07-mm
Si7422DN-T1
Si7422DN-T1--E3
18-Jul-08
|
Si4451DY
Abstract: No abstract text available
Text: SPICE Device Model Si4451DY Vishay Siliconix P-Channel 12-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4451DY
18-Jul-08
|
Si4405DY
Abstract: Si4405DY SPICE Device Model
Text: SPICE Device Model Si4405DY Vishay Siliconix P-Channel 30-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4405DY
18-Jul-08
Si4405DY SPICE Device Model
|
|
SI4464
Abstract: Si4464DY
Text: SPICE Device Model Si4464DY Vishay Siliconix N-Channel 200-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4464DY
S-51095Rev.
13-Jun-05
SI4464
|
Si4430DY
Abstract: No abstract text available
Text: SPICE Device Model Si4430DY Vishay Siliconix N-Channel 30-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4430DY
S-51095Rev.
13-Jun-05
|
Si4425BDY
Abstract: 15TR13
Text: SPICE Device Model Si4425BDY Vishay Siliconix P-Channel 30-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4425BDY
S-51095Rev.
13-Jun-05
15TR13
|
Untitled
Abstract: No abstract text available
Text: SiE820DF Vishay Siliconix N-Channel 20-V D-S MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 Definition • Extremely Low Qgd WFET Technology for Low Switching Losses • TrenchFET Power MOSFET • Ultra Low Thermal Resistance Using TopExposed PolarPAK® Package for Double-Sided Cooling
|
Original
|
PDF
|
SiE820DF
2002/95/EC
2011/65/EU
2002/95/EC.
2002/95/EC
2011/65/EU.
12-Mar-12
|
Untitled
Abstract: No abstract text available
Text: SiE800DF Vishay Siliconix N-Channel 30-V D-S MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 Definition • Extremely Low Qgd WFET Technology for Low Switching Losses • TrenchFET Power MOSFET • Ultra Low Thermal Resistance Using TopExposed PolarPAK® Package for Double-Sided Cooling
|
Original
|
PDF
|
SiE800DF
2002/95/EC
11-Mar-11
|
Untitled
Abstract: No abstract text available
Text: SiE800DF Vishay Siliconix N-Channel 30 V D-S MOSFET FEATURES PRODUCT SUMMARY • Halogen-free According to IEC 61249-2-21 Definition • Extremely Low Qgd for Low Switching Losses • TrenchFET Power MOSFET • Ultra Low Thermal Resistance Using TopExposed PolarPAK® Package for Double-Sided
|
Original
|
PDF
|
SiE800DF
2002/95/EC
11-Mar-11
|
Untitled
Abstract: No abstract text available
Text: 7 8 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION LOC REVISIONS Dl ST CM 54 ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. LTR DATE DESCRIPTION R EC 0G3B 1043 04 DWN APVD BSV DPB 13JUN05 D D ro CL CM < ^ _ □ C 0.38 A + -0.25
|
OCR Scan
|
PDF
|
13JUN05
TA-156
31MAR2000
|
Untitled
Abstract: No abstract text available
Text: 7 8 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. LÛC ALL RIGHTS RESERVED. DIST REVISIONS CM 54 LTR V DATE DESCRIPTION EC 0G3B 1043 04 DWN APVD BSV DPB 13JUN05 D D CL CN 95.1 0 3 .7 4 4 24 5-640474-4 91.13
|
OCR Scan
|
PDF
|
13JUN05
4-640ING
TA-156
31MAR2000
|
Untitled
Abstract: No abstract text available
Text: 8 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. REVISIONS LOC Dl ST CM 54 LTR R DATE DESCRIPTION DWN BSV DPB 13JUN05 EC 0G3B 1043 04 APVD D CL Csl < □ C 2.46+0.15 +0,38 -0.25 + .015
|
OCR Scan
|
PDF
|
13JUN05
MTA-156
31MAR2000
|
13JAN
Abstract: No abstract text available
Text: 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 6 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. D C A SPACES AT 2.5 4 [.1 00] = B 1.14 [.045] L 2.29 + 0.05 [.0 9 0 + .002] 0.7 6 + 0.05 [.0 3 0 + .002] RECOMMENDED PC BOARD MOUNTING DIMENSIONS
|
OCR Scan
|
PDF
|
POSITIONS81-5
13JAN
|