Contextual Info: 8 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - RELEASED FOR PUBLICATION ALL RIGHTS RESERVED. BY TYCO ELECTRONIC5 CORPORATION. D B A 0.08 .003 0.05 .002 0.00381 .0001 50 0.001 27 .000050 0.00076 .000030 MM IN 1 .40 1 .00 0.76 0.25 0 .13 MM .055 .039 .030 .01 O

STI5514

Abstract: JTAG STi5514 ST40 STM ST40 System Architecture B-72 st40 instruction set B9010 aseram sh4 stmicroelectronics
Contextual Info: ST40RA 32-bit Embedded SuperH Device Integer & FP execution units JTAG JTAG Debug Registers Mailbox UDI 24 data SCIF MMU D Cache MMU I Cache PIO interface SCIF 5 channel DMA controller Timer TMU Real-time clock Cbus Bridge/ SuperHyway I/F 2 channel control

STI5514

Abstract: st40 jtag ST40 manual ST40 System Architecture st40 Application CPU STi55 ST40RA150XHA ST40RA150 VDDRTC ST40
Contextual Info: ST40RA 32-bit Embedded SuperH Device Integer & FP execution units JTAG JTAG Debug Registers Mailbox UDI 24 data SCIF MMU D Cache MMU I Cache PIO interface SCIF 5 channel DMA controller Timer TMU Real-time clock Cbus Bridge/ SuperHyway I/F 2 channel control

Contextual Info: ST40RA 32-bit Embedded SuperH Device Integer & FP execution units JTAG JTAG Debug Registers Mailbox UDI 24 data SCIF MMU D Cache MMU I Cache PIO interface SCIF 5 channel DMA controller Timer TMU Real-time clock Cbus Bridge/ SuperHyway I/F 2 channel control