Untitled
Abstract: No abstract text available
Text: DG2799 Vishay Siliconix Low Voltage, Low On-Resistance, Dual DPDT Analog Switch DESCRIPTION The DG2799 is a dual double-pole/double-throw monolithic CMOS analog switch designed for high performance switching of analog signals. Combining low power, high speed, low
|
Original
|
PDF
|
DG2799
DG2799
HP4192A
S-51893â
12-Sep-05
|
Si7117DN
Abstract: No abstract text available
Text: Si7117DN New Product Vishay Siliconix P-Channel 150-V D-S MOSFET PRODUCT SUMMARY VDS (V) –150 FEATURES rDS(on) (W) ID (A) 1.2 @ VGS = –10 V –2.17 1.3 @ VGS = –6 V –2.1 Qg (Typ) 7 7 nC 7.7 D TrenchFETr Power MOSFETs D PowerPAKr Package – Low Thermal Resistance
|
Original
|
PDF
|
Si7117DN
Si7117DN-T1--E3
08-Apr-05
|
MC9S12XF512RMV1
Abstract: S12XF temperature controller CHB 401 asea MBT 225 PMF15B6C MC9S12XF256 P112l ifr 2310 Operating Manual ASEA motor b3 freescale superflash
Text: MC9S12XF512 Reference Manual Covers MC9S12XF512 MC9S12XF384 MC9S12XF256 MC9S12XF128 S12X Microcontrollers MC9S12XF512RMV1 Rev.1.20 10-Nov-2010 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most
|
Original
|
PDF
|
MC9S12XF512
MC9S12XF512
MC9S12XF384
MC9S12XF256
MC9S12XF128
MC9S12XF512RMV1
10-Nov-2010
MC9S12XF512V1RM
02-Nov-2010
MC9S12XF512RMV1
S12XF
temperature controller CHB 401
asea MBT 225
PMF15B6C
MC9S12XF256
P112l
ifr 2310 Operating Manual
ASEA motor b3
freescale superflash
|
ladder network
Abstract: No abstract text available
Text: Model TxxS Vishay Techno Single-In-Line, Coated, 4 Bits to 8 Bits R/2R Ladder Networks APPLICATIONS R/2R Ladder networks for D/A and A/D converter with bi-polar or CMOS switches ELECTRICAL SPECIFICATIONS Ladder Network Accuracy on Linearity: ± 1/2 LSB. Ladder Network Resistance Tolerance: ± 2 %.
|
Original
|
PDF
|
08-Apr-05
ladder network
|
9S12XEP100
Abstract: DELAY code for MC9S12XEP100 S12XMPUV1 9S12XEP768 9S12XE S12XMMCV4 ADC12B16C example MC9S12XEP100 MC9S12XE100 9S12x
Text: MC9S12XEP100 Reference Manual Covers MC9S12XE Family HCS12 Microcontrollers MC9S12XEP100 Rev. 1.02 11/2006 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
PDF
|
MC9S12XEP100
MC9S12XE
HCS12
9S12XEP100
DELAY code for MC9S12XEP100
S12XMPUV1
9S12XEP768
9S12XE
S12XMMCV4
ADC12B16C
example MC9S12XEP100
MC9S12XE100
9S12x
|
manual temperature controller CHB 702
Abstract: MC9S12XF asea MBT 160 S12XF256 NVP 1204 1M64J S12XF384 transistor f a614 729 PIN CONFIGURATION 2M64J Logic Cross-Reference
Text: MC9S12XF512 Reference Manual Covers MC9S12XF512 MC9S12XF384 MC9S12XF256 MC9S12XF128 S12X Microcontrollers MC9S12XF512V1RM Rev.1.17 02-October-2008 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most
|
Original
|
PDF
|
MC9S12XF512
MC9S12XF384
MC9S12XF256
MC9S12XF128
MC9S12XF512V1RM
02-October-2008
manual temperature controller CHB 702
MC9S12XF
asea MBT 160
S12XF256
NVP 1204
1M64J
S12XF384
transistor f a614 729 PIN CONFIGURATION
2M64J
Logic Cross-Reference
|
Untitled
Abstract: No abstract text available
Text: Si5858DU New Product Vishay Siliconix N-Channel 20-V D-S MOSFET with Schottky Diode FEATURES MOSFET PRODUCT SUMMARY rDS(on) (W) ID (A)a 0.039 @ VGS = 4.5 V 6 0.045 @ VGS = 2.5 V 6 0.055 @ VGS = 1.8 V 6 VDS (V) 20 D LITTLE FOOTr Plus Power MOSFET D New Thermally Enhanced PowerPAKr
|
Original
|
PDF
|
Si5858DU
08-Apr-05
|
Si4810BDY
Abstract: No abstract text available
Text: SPICE Device Model Si4810BDY Vishay Siliconix N-Channel 30-V D-S MOSFET with Schottky Diode CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si4810BDY
18-Jul-08
|
si5938
Abstract: SI5938DU
Text: Si5938DU New Product Vishay Siliconix Dual N-Channel 20-V D-S MOSFET PRODUCT SUMMARY VDS (V) 20 rDS(on) (W) FEATURES ID (A)a 0.039 @ VGS = 4.5 V 6 0.045 @ VGS = 2.5 V 6 0.055 @ VGS = 1.8 V 6 Qg (Typ) 6 nC D TrenchFETr Power MOSFET D New Thermally Enhanced PowerPAKr
|
Original
|
PDF
|
Si5938DU
Si5938DU-T1
08-Apr-05
si5938
|
Si3454ADV
Abstract: No abstract text available
Text: SPICE Device Model Si3454ADV Vishay Siliconix N-Channel 30-V D-S MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si3454ADV
S-51867Rev.
12-Sep-05
|
PLD-10
Abstract: No abstract text available
Text: MC9S12XEP100 Reference Manual Covers MC9S12XE Family HCS12 Microcontrollers MC9S12XEP100 Rev. 1.07 05/2007 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
|
Original
|
PDF
|
MC9S12XEP100
MC9S12XE
HCS12
PLD-10
|
Untitled
Abstract: No abstract text available
Text: DG2731/2732/2733 Vishay Siliconix Low Voltage, 0.4 Ω, Dual SPDT Analog Switch DESCRIPTION The DG2731/2732/2733 are low voltage, low on-resistance, dual single-pole/double-throw SPDT monolithic CMOS analog switches designed for high performance switching of analog signals. Combining
|
Original
|
PDF
|
DG2731/2732/2733
DG2731/2732/2733
DG2731
DG2732
DG2733
18-Jul-08
|
Si5853DC
Abstract: No abstract text available
Text: SPICE Device Model Si5853DC Vishay Siliconix P-Channel 1.8-V G-S MOSFET with Schottky Diode CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si5853DC
S-51891Rev.
12-Sep-05
|
Si1913EDH
Abstract: No abstract text available
Text: SPICE Device Model Si1913EDH Vishay Siliconix Dual P-Channel 20-V D-S MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
Si1913EDH
S-51866Rev.
12-Sep-05
|
|
|
mos 6550
Abstract: SUV85N10-10 1723c as89
Text: SPICE Device Model SUV85N10-10 Vishay Siliconix N-Channel 100-V D-S 175°C MOSFET CHARACTERISTICS • N-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range
|
Original
|
PDF
|
SUV85N10-10
S-51885Rev.
12-Sep-05
mos 6550
SUV85N10-10
1723c
as89
|
SURGE RESISTOR
Abstract: GR-1089 TSR100FF
Text: TSR Vishay Techno Surge Resistor SIP Pair of Matched Resistors APPLICATION • Secondary protection for telecon line cards • Lightning Protection to Bellcore GR-1089 and ITU-T K.20 • Optional version with thermal fuse • Custom designs available LIGHTNING SURGE TESTS
|
Original
|
PDF
|
GR-1089
GR-1089:
TSR100FF
12-Sep-05
SURGE RESISTOR
TSR100FF
|
dp83848vv
Abstract: No abstract text available
Text: DP83848I PHYTER - Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver General Description Features The DP83848I is a robust fully featured 10/100 single port Physical Layer device offering low power consumption, including several intelligent power down
|
Original
|
PDF
|
DP83848I
9-Oct-06
3-Jul-06
4-Aug-06
6-Jul-06
dp83848vv
|
1044369
Abstract: No abstract text available
Text: 12SEP05_ 10:51am us001 193 H:\ dm tm od\ ECs\ e012405clndia\ 104436-c.dwq 4 3 2 LOC NOTED PO IN T OF OBSOLETE D IM E N S IO N S MEASUREMENT APPLY FOR 00 AT TH E PLATING R E V IS IO N S D IS T AD TH E 1 P LTR D E S C R IP T IO N DATE 2, EC 0G3C 0 1 2 4 05
|
OCR Scan
|
PDF
|
31MAR2000
12SEP05
us001193
\dmtmod\ECs\e01
2405clndia\1
1044369
|
Untitled
Abstract: No abstract text available
Text: 6 7 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 5 2 RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. ALL RIGHTS RESERVED. LOC DIST AD 00 R E VIS IO N S P LTR DESCRIPTION DATE H EC 0G3C 0 2 3 2 H1 REV PER ECO — 09 —021 826 05 DWN APVD 12SEP05 BSV JLG
|
OCR Scan
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: 8 7 THIS DRAWING IS UNPUBLISHED. /p\ ^ COPYRIGHT - RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. 6 5 4 3 2 - ALL RIGHTS RESERVED. LOC DIST AD 00 1 R E VIS IO N S P LTR DESCRIPTION H EC 0G3C 0 2 3 2 DATE DWN 12SEP05 05 APVD BSV JLG D D C REF .092 + .003
|
OCR Scan
|
PDF
|
12SEP05
31MAR2000
|
54HM
Abstract: No abstract text available
Text: 4 3 THIS DRAWING IS UNPUBLISHED. COPYRIGHT RELEASED FOR PUBLICATION BY TYCO ELECTRONICS CORPORATION. - 2 - LOC ALL RIGHTS RESERVED. 2x DIST R E V IS IO N S GP 00 1 6.33- 10 -2X #4-40 DESCRIPTION GP 12SEP05 RELEASED PER EC 0S13 - 0 0 8 7 - 0 5 INSERT JG
|
OCR Scan
|
PDF
|
12SEP05
31MAR2000
54HM
|
Untitled
Abstract: No abstract text available
Text: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT 2 3 RELEASED BY TYCO ELECTRONICS CORPORATION. FOR PUBLICATION - - LOC ALL RIGHTS RESERVED. GP REVISIONS DIST 00 P LTR DESCRIPTION A D 2x 1 0 -38.99 2x HOUSING: 0 3 .0 5 [. 1 20] [ 1 .5 35 ] 1 2 3 4 5 6 7 8 POLYESTER,
|
OCR Scan
|
PDF
|
24JAN
54jum
HD-20
12SEP05
31MAR2000
|
Untitled
Abstract: No abstract text available
Text: 4 THIS DRAWING IS UNPUBLISHED. COPYRIGHT - 3 RELEASED FOR PUBLICATION - 2 - LOC ALL RIGHTS RESERVED. DIST R E V IS IO N S GP 00 By - -2x #4-40 P LTR A1 IN S E R T !A D DESCRIPTION HOUSING: BLACK INSERTS: BRASS PO LYE STE R , UL 9 4 V - 0 DATE REVISED PER ECO -1 1 - 00483 5
|
OCR Scan
|
PDF
|
1MAR11
76/zm
54/zm
12SEP05
|
Untitled
Abstract: No abstract text available
Text: 4 TH IS DRAWING IS U N P U B L IS H E D . RELEASED FOR PUBLICATIO N A L L RIGHTS COPYRIGHT 2 3 - - LOC BY TYCO ELECTRONICS CORPORATION. 1 2 3 4 5 R E V IS IO N S 6 7 8 9 D E S C R IP TIO N —5 5 . 4 7 ± 0 . 1 5 [2.1 8 4 - . 0 0 6 ] D D IS T GP 00 RESERVED.
|
OCR Scan
|
PDF
|
0S13-0087-05
12SEP05
31MAR2000
|