MAN05
Abstract: MK2732-05 MK2732-05S MK2732-05STR
Text: MK2732-05 Low Phase Noise VCXO+Multiplier ICROCLOCK Description Features The MK2732-05 is a low cost, low jitter, high performance VCXO and PLL clock synthesizer designed to replace expensive discrete VCXOs and multipliers. The on-chip Voltage Controlled Crystal Oscillator VCXO accepts a 0 to 3 V
|
Original
|
PDF
|
MK2732-05
MK2732-05
MAN05
MK2732-05S
MK2732-05STR
|
thyristor 4092
Abstract: D1029N D2209N D2659N D4401N D660N D748N
Text: M3.2 - Schaltung ~ Anschlußspannung ~ ~ ~ ~ ~ 690 Veff Bemessungs-Gleichspannung Sperrspannung Bauelement n. VDE 0558 VRRM 390 V 2200 V + Kühlblöcke für Luftselbstkühlung Temp. tA Satzstrom Id Verlustl. P d Luftmen. v L Schaltung pro KB Diode D [°C]
|
Original
|
PDF
|
D748N
D660N
D1029N
D2209N
thyristor 4092
D1029N
D2209N
D2659N
D4401N
D660N
D748N
|
13012
Abstract: D1029N D748N T1059N T1589N T308N T458N T459N T709N K50 DIODE
Text: B2H - Schaltung ~ Anschlußspannung 690 Veff Bemessungs-Gleichspannung Sperrspannung Bauelement n. VDE 0558 VDRM/RRM 630 V 2200 V + - Kühlblöcke für Luftselbstkühlung Temp. tA Satzstrom Id [°C] [A] 35 40 45 50 55 60 100 146 180 221 271 342 414 478 533
|
Original
|
PDF
|
D748N
D1029N
D2209N
T308N
13012
D1029N
D748N
T1059N
T1589N
T308N
T458N
T459N
T709N
K50 DIODE
|
Untitled
Abstract: No abstract text available
Text: RoboClock CY7B993V, CY7B994V High Speed Multi Phase PLL Clock Buffer Features Functional Description • 500 ps Max Total Timing Budget TTB window ■ 12 MHz to 100 MHz (CY7B993V), or 24 MHz to 200 MHz (CY7B994V) Input/Output Operation ■ Matched Pair Output Skew < 200 ps
|
Original
|
PDF
|
CY7B993V,
CY7B994V
CY7B993V
CY7B994V
|
sony ps3 eye camera
Abstract: 6d40 engine diagram sgx530* vector graphics manual dsi CVBS BTA 16 6008 PowerVR SGX series 5 "cmos camera "mc 7258 wiring diagram ccd camera mc 7218 wiring diagram ET 439 power module fuji
Text: Public Version AR Y OMAP OMAP34xx Multimedia Device Silicon Revision 3.1, 3.1.1 Texas Instruments OMAP™ Family of Products EL IM IN Version R PR Technical Reference Manual Literature Number: SWPU114R July 2007 – Revised April 2009 Public Version www.ti.com
|
Original
|
PDF
|
OMAP34xx
SWPU114R
sony ps3 eye camera
6d40 engine diagram
sgx530* vector graphics manual
dsi CVBS
BTA 16 6008
PowerVR SGX series 5
"cmos camera "mc 7258 wiring diagram
ccd camera mc 7218 wiring diagram
ET 439 power module fuji
|
48MHZ
Abstract: CY28325-2 SSOP-48 W305B
Text: CY28325-2 PRELIMINARY FTG for VIA Pentiumâ 4 Chipsets Features • Spread Spectrum Frequency Timing Generator for VIA Pentiumâ 4 Chipsets • Programmable clock output frequency with less than 1 MHz increment • Integrated fail-safe Watchdog Timer for system
|
Original
|
PDF
|
CY28325-2
CY28325-2
48MHZ
SSOP-48
W305B
|
CY7B993V
Abstract: CY7B993V-2AC CY7B993V-2AI CY7B994V CY7B994V-2AC
Text: RoboClock CY7B994V CY7B993V High-speed Multi-phase PLL Clock Buffer Features • 500-ps max. Total Timing Budget TTB™ window • 12–100-MHz (CY7B993V), or 24–200-MHz (CY7B994V) output operation • Matched pair output skew < 200 ps • Zero input-to-output delay
|
Original
|
PDF
|
CY7B994V
CY7B993V
500-ps
100-MHz
CY7B993V)
200-MHz
CY7B994V)
625-/1300-ps
CY7B993V
CY7B993V-2AC
CY7B993V-2AI
CY7B994V
CY7B994V-2AC
|
140X10019X
Abstract: A10749
Text: Flatcable Connectors D I N 416 51 Flatcable connectors Plug connector – angled Description Solder pin Pin length 2.9 mm alternative 4.5 mm * on request 10 to 64 positions Center polarization Available with long, short and without latches Long latches for socket connector with strain relief
|
Original
|
PDF
|
140X10019X
140X10029X
140X10019X
A10749
|
Untitled
Abstract: No abstract text available
Text: LOW COST CURRENT TRANSFORMERS FREQUENCY RANGE 50-400 HERTZ FEATURES APPLICATIONS • Manufactured to meet requirements of UL1244 and revisions. • For use with OSI PC5 series and model W series watt/watthour transducers. • All models on this page U.L. recognized file number E134271.
|
Original
|
PDF
|
UL1244
E134271.
UL1015,
105OC,
|
U4744B
Abstract: U4744 S852T U4479B U4479B-MFLG3
Text: U4479B DVB-Cable IF Converter and Full Multi-Standard Video-/Sound IF Processing Description The U4479B is a bipolar circuit for the processing of cable DVB IF Digital Video Broadcasting and multistandard analog TV IF signals. The combi circuit processes QAM modulated IF signals, all TV video IF
|
Original
|
PDF
|
U4479B
U4479B
D-74025
23-Apr-99
U4744B
U4744
S852T
U4479B-MFLG3
|
PCB Connectors
Abstract: conec ATC22
Text: Technology in connectors PCB Connectors CONEC Elektronische Bauelemente GmbH Ostenfeldmark 16 59557 Lippstadt Germany Tel. +49 2941 765-0 Fax +49 2941 76565 E-Mail info@conec.de www.conec.com PCB Connectors CONEC s.r.o. Loucka 119 76325 Ujezd Czech Republic
|
Original
|
PDF
|
101025B
PCB Connectors
conec
ATC22
|
407257-1
Abstract: 164589 028-7428 03601-30 74676 0674068 141898 1606445 74127 60034
Text: Narrow Wide Plots Back to RFM Website S-Parameter Narrow "RF1172C, 7/10/02 " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " 427.411200 -.1873169, -.1873474, -.1869202, -.1868591,
|
Original
|
PDF
|
RF1172C,
407257-1
164589
028-7428
03601-30
74676
0674068
141898
1606445
74127
60034
|
Untitled
Abstract: No abstract text available
Text: RoboClock CY7B993V, CY7B994V High Speed Multi Phase PLL Clock Buffer Features Functional Description • 500 ps Max Total Timing Budget TTB window ■ 12 MHz to 100 MHz (CY7B993V), or 24 MHz to 200 MHz (CY7B994V) Input/Output Operation ■ Matched Pair Output Skew < 200 ps
|
Original
|
PDF
|
CY7B993V,
CY7B994V
CY7B993V
CY7B994V
|
u4744B
Abstract: S852T U4479B U4479B-MFLG3
Text: U4479B DVB-Cable IF Converter and Full Multi-Standard Video-/Sound IF Processing Description The U4479B is a bipolar circuit for the processing of cable DVB IF Digital Video Broadcasting and multistandard analog TV IF signals. The combi circuit processes QAM modulated IF signals, all TV video IF
|
Original
|
PDF
|
U4479B
U4479B
D-74025
14-Jan-98
u4744B
S852T
U4479B-MFLG3
|
|
|
pioneer pll
Abstract: W162 F10UF
Text: W162 Spread Aware , Zero Delay Buffer Features Table 1. Input Logic • Spread Aware™—designed to work with SSFTG reference signals • Two banks of four outputs, plus the fed back output • Outputs may be three-stated • Available in 16-pin SOIC or SSOP package
|
Original
|
PDF
|
16-pin
pioneer pll
W162
F10UF
|
W163
Abstract: No abstract text available
Text: W163 Spread Aware , Zero Delay Buffer Features Key Specifications • Spread Aware™—designed to work with SSFTG reference signals • Outputs may be three-stated • Available in 8-pin SOIC package • Extra strength output drive available -15 version
|
Original
|
PDF
|
|
W162
Abstract: No abstract text available
Text: W162 Spread Aware , Zero Delay Buffer Features Table 1. Input Logic • Spread Aware™—designed to work with SSFTG reference signals • Two banks of four outputs, plus the fed back output • Outputs may be three-stated • Available in 16-pin SOIC or SSOP package
|
Original
|
PDF
|
16-pin
W162
|
S852T
Abstract: U4479B U4479B-AFLG3 U4744B
Text: U4479B DVB-Cable IF Converter and Full Multi-Standard Video-/Sound IF Processing Description The U4479B is a bipolar circuit for the processing of cable DVB IF Digital Video Broadcasting and multistandard analog TV IF signals. The combi circuit processes QAM modulated IF signals, all TV video IF
|
Original
|
PDF
|
U4479B
U4479B
D-74025
21-Nov-97
S852T
U4479B-AFLG3
U4744B
|
iB39
Abstract: No abstract text available
Text: II 12 9 IS T 8 6 1 71251 3 1 I 2 NOTESs 1. CARD SLOT ACCEPTS .050±.004 L27±0. 10) MODULE THICKNESS. (MEASURED OVER P.C. PADS). 2. ALL PEGS ARE INTERFERENCE PITS TO PCB UNLESS NOTED ON THE DWG. il 'A il a 3. REPER TO PRODUCT SPEC P S - 7 1243-9999 FOR PERPORMANCE SPECS.
|
OCR Scan
|
PDF
|
PS-71243-9999
S7125132
iB39
|
2n7588
Abstract: P3139 BC233A sprague 40d GEX36/7 C4274 s1766 C12712 TC236 GP149
Text: SPRAGUE THE M A R K O F R E L I A B I L I T Y SEMICONDUCTOR REPLACEMENT MANUAL K -5 0 0 TABLE OF CONTENTS Guidelines for Replacing Semiconductors. 1 Specifications, Small-Signal and Power Transistors.
|
OCR Scan
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: D-Subminiature connectors •370 inch Solder pin angled with threaded lock, mountingand grounding bracket Socket connector Plug connector 7 itO 3 7 U*0 3 Kat 1 i JOA Kat 1 i J1A A -0 ,7 6 B - 0.25 C 9 31,19 16,46 25,00 ♦.$•>! 15 39,52 24,79 25 53,42 37
|
OCR Scan
|
PDF
|
15-polig/way
25-polig/way
37-polig/way
50-polig/way
26-polig/way
44-polig/way
62-polig/way
78-poliq/way
|
Untitled
Abstract: No abstract text available
Text: 12 II 9 10 8 7 6 1 71243 3 1 2 I NOTESs L CARD SLOT ACCEPTS .05O±.0O4 I 27±0. 10 MODULE THICKNES (MEASURED OVER P.C. PADS). 2. ALL PEGS ARE INTERFERENCE FITS TO PCB UNLESS NOTED ON THE DWG. 3. REFER 4. PRODUCT 5. RECOMMENDED TO PRODUCT SPEC IS PACKAGED
|
OCR Scan
|
PDF
|
PS-71243-9999
I0A30-)
|
Untitled
Abstract: No abstract text available
Text: H ITAC HI/ M C U / M PU TE dF | 4MciLE0M DD15274 4496204 HITACHI/ M C U/ MPU 7 92D 12274 D T~SZ-^^~fO HD63084- -D I P P Document Image Pre-Processor —PRELIMINARY— The HD63084 (DPP) is an document image processor used as a peripheral o f a microcomputer. I t reads analog image signals
|
OCR Scan
|
PDF
|
DD15274
HD63084------
HD63084
|
Untitled
Abstract: No abstract text available
Text: A B c ÉZ. D REV ECO DWN DATE H 20041920 ELL 12-27-99 J 20079340 PA 31-JAN-01 REAR END CAP-TAPE END WRENCH F L A T REAR S E A L R I N G L A R GE R D I A M E T E R O-RING OU T E R B R A I D CABLE- -CUT END -OUTER J A C K E T 2 2 CUT C A B L E END S Q U A R E . S L I D E END CAP AND REAR S E A L R I N G OVER THE OUTER
|
OCR Scan
|
PDF
|
-JAN-01
|
