Untitled
Abstract: No abstract text available
Text: January 2008 HYS[64/72]T64000EU–[1.9/19F]–C HYS[64/72]T128020EU–[1.9/19F]–C 2 4 0 - P i n u n b u f f e r e d D D R 2 S D R A M Mo d u l e s UDIMM SDRAM RoHS Compliant Internet Data Sheet Rev. 1.0 Internet Data Sheet HYS[64/72]T[64/128]0x0EU–[1.9/19F]–C
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T64000EU
9/19F]
T128020EU
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pc2-6400u-666-12-d0
Abstract: HYS64T256020EU-19F-C2 pc2-6400u-666-12-e0 HYS72T256020EU-2 HYS64T128000EU PC2-6400E-666-12-F0 HYS72T256020EU HYS72T128000EU PC2-6400E-666-12-G0 HYS64T256
Text: June 2008 HYS64T128000EU–[19F/1.9/25F/2.5/3S]–C2 HYS72T128000EU–[25F/2.5/3S]–C2 HYS64T256020EU–[19F/1.9/25F/2.5/3S]–C2 HYS72T256020EU–[25F/2.5/3S]–C2 240-Pin Unbuffered DDR2 SDRAM Modules UDIMM SDRAM EU RoHS Compliant Internet Data Sheet Rev. 1.00
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HYS64T128000EU
19F/1
9/25F/2
HYS72T128000EU
25F/2
HYS64T256020EU
HYS72T256020EU
pc2-6400u-666-12-d0
HYS64T256020EU-19F-C2
pc2-6400u-666-12-e0
HYS72T256020EU-2
HYS64T128000EU
PC2-6400E-666-12-F0
HYS72T256020EU
HYS72T128000EU
PC2-6400E-666-12-G0
HYS64T256
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MX25L1605D
Abstract: MX25L1635D IN3064
Text: MX25L1635D MX25L1635D DATASHEET P/N: PM1374 1 REV. 1.9, SEP. 08, 2009 MX25L1635D Contents FEATURES. 5
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MX25L1635D
PM1374
MX25L1605D
MX25L1635D
IN3064
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Untitled
Abstract: No abstract text available
Text: MX25U1635E MX25U1635E DATASHEET P/N: PM1472 1 REV. 1.9, NOV. 08, 2013 MX25U1635E Contents 1. FEATURES. 6
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MX25U1635E
PM1472
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Untitled
Abstract: No abstract text available
Text: MX25U3235E MX25U3235E DATASHEET P/N: PM1472 1 REV. 1.9, NOV. 11, 2013 MX25U3235E Contents 1. FEATURES. 6
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MX25U3235E
PM1472
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Untitled
Abstract: No abstract text available
Text: MX25L6436E MX25L6436E HIGH PERFORMANCE SERIAL FLASH SPECIFICATION P/N: PM1772 1 REV. 1.9, APR. 30, 2012 MX25L6436E Contents FEATURES. 5
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MX25L6436E
PM1772
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Serial Flash
Abstract: No abstract text available
Text: MX25L12845E MX25L12845E HIGH PERFORMANCE SERIAL FLASH SPECIFICATION P/N: PM1428 REV. 1.9, SEP. 06, 2013 1 MX25L12845E Contents FEATURES. 5
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MX25L12845E
PM1428
Serial Flash
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K643
Abstract: 65A3 n373 276C 238e ts-w 307f K573 2732 memory chip motorola 5118 user manual ber 2a37 rX 433 N
Text: S19204CBI12 MEKONG Datasheet Rev 1.9 September 16, 2002 AMCC - PROPRIETARY AND CONFIDENTIAL RESTRICTED DISTRIBUTION NDA REQUIRED AMCC - Confidential and Proprietary Dear customer, Thank you for choosing an AMCC device. We appreciate your confidence in our products.
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S19204CBI12
S19204CBI12:
STS-192/STM-64
K643
65A3
n373
276C 238e
ts-w 307f
K573
2732 memory chip
motorola 5118 user manual ber
2a37
rX 433 N
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TTL to LVTTL level shifter
Abstract: No abstract text available
Text: a Multirate to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp ADN2819 FEATURES Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎ 100 mV 1.9 GHz Minimum Bandwidth
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ADN2819
ADN2819
48-Lead
CP-48)
MO-220-VKKD-2
C02999
TTL to LVTTL level shifter
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ADN2811
Abstract: STM-16
Text: OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 FEATURES PRODUCT DESCRIPTION Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth
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OC-48/OC-48
ADN2811
MO-220-VKKD-2
48-Lead
CP-48)
ADN2811ACP-CML
ADN2811ACP-CML-RL
EVAL-ADN2811-CML
ADN2811
STM-16
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Untitled
Abstract: No abstract text available
Text: Multirate to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp ADN2819 FEATURES PRODUCT DESCRIPTION Meets SONET requirements for jitter transfer/generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth
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ADN2819
CP-48)
ADN2819ACP-CML
ADN2819ACP-CML-RL
ADN2819ACPZ-CML1
ADN2819ACPZ-CML-RL1
EVAL-ADN2819-CML
48-Lead
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Untitled
Abstract: No abstract text available
Text: OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 FEATURES PRODUCT DESCRIPTION Meets SONET requirements for jitter transfer/generation/ tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth
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OC-48/OC-48
ADN2811
MO-220-VKKD-2
48-Lead
CP-48)
ADN2811ACP-CML
ADN2811ACP-CML-RL
EVAL-ADN2811-CML
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ADN2819
Abstract: OC-24
Text: Multirate to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp ADN2819 FEATURES PRODUCT DESCRIPTION Meets SONET requirements for jitter transfer/generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth
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ADN2819
CP-48)
ADN2819ACP-CML
ADN2819ACP-CML-RL
ADN2819ACPZ-CML1
ADN2819ACPZ-CML-RL1
EVAL-ADN2819-CML
48-Lead
ADN2819
OC-24
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Untitled
Abstract: No abstract text available
Text: DRV8811 www.ti.com SLVS865H – SEPTEMBER 2008 – REVISED NOVEMBER 2013 STEPPER MOTOR CONTROLLER IC Check for Samples: DRV8811 FEATURES 1 • Pulse Width Modulation PWM Microstepping Motor Driver – Built-In Microstepping Indexer – Up to 1.9-A Current Per Winding
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DRV8811
SLVS865H
DRV8811
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c0301
Abstract: ADN2811 ADN2811ACP-CML ADN2811ACP-CML-RL CP-48 GR-253-CORE STM-16 Fiber Optic regenerator 28
Text: a OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 FEATURES Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎100 mV 1.9 GHz Minimum Bandwidth Patented Clock Recovery Architecture
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OC-48/OC-48
ADN2811
C03019
MO-220-VKKD-2
12/02--Data
c0301
ADN2811
ADN2811ACP-CML
ADN2811ACP-CML-RL
CP-48
GR-253-CORE
STM-16
Fiber Optic regenerator 28
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106 25K
Abstract: 6608 6 channels rc receiver double diode 5341 2312 2551 5602
Text: 1. Stratix III Device Datasheet: DC and Switching Characteristics SIII52001-1.9 Electrical Characteristics Operating Conditions When Stratix III devices are implemented in a system, they are rated according to a set of defined parameters. To maintain the highest possible performance and
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SIII52001-1
EP3SL50,
EP3SL110,
EP3SE80.
106 25K
6608 6 channels rc receiver
double diode 5341
2312 2551 5602
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vhdl code for 1 bit error generator
Abstract: No abstract text available
Text: Cyclone IV Device Handbook, Volume 1 Cyclone IV Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CYIV-5V1-1.9 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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Untitled
Abstract: No abstract text available
Text: Cyclone IV Device Handbook, Volume 1 Cyclone IV Device Handbook, Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CYIV-5V1-1.9 2013 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
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h10s raltron
Abstract: ADN2819 ADN2819ACP-CML ADN2819ACP-CML-RL CP-48 GR-253-CORE OC-24 H10S-19
Text: a Multirate to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp ADN2819 FEATURES Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎100 mV 1.9 GHz Minimum Bandwidth Patented Clock Recovery Architecture
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ADN2819
MO-220-VKKD-2
1/03--Data
C02999
h10s raltron
ADN2819
ADN2819ACP-CML
ADN2819ACP-CML-RL
CP-48
GR-253-CORE
OC-24
H10S-19
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Untitled
Abstract: No abstract text available
Text: a OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp ADN2811 FEATURES Meets SONET Requirements for Jitter Transfer/ Generation/Tolerance Quantizer Sensitivity: 4 mV Typ Adjustable Slice Level: ؎100 mV 1.9 GHz Minimum Bandwidth Patented Clock Recovery Architecture
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OC-48/OC-48
ADN2811
48-Lead
CP-48)
MO-220-VKKD-2
C03019
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Ethernetblaster
Abstract: pin configuration of buffer EP3SE50 EPCS128 EPCS16 EPCS64
Text: 11. Configuring Stratix III Devices SIII51011-1.9 This chapter contains complete information about Stratix III supported configuration schemes, how to execute the required configuration schemes, and all necessary option pin settings. Stratix III devices use SRAM cells to store configuration data. Because SRAM memory
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SIII51011-1
Ethernetblaster
pin configuration of buffer
EP3SE50
EPCS128
EPCS16
EPCS64
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A42 BF 331
Abstract: Date Code Formats diodes St Microelectronics MCF5272C3 JP13 M5272C3 M5407C3 MCF5272 LST670 equivalent MOLEX RJ45 lxt971l
Text: M5272C3 User’s Manual M5272C3UM/D Rev. 1.2, 1/2001 CONTENTS Paragraph Number Title Page Number Chapter 1 M5272C3 Board 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 1.9.1 1.9.2 1.9.3 1.9.4 1.9.5 1.9.6 1.9.7 1.10 1.11 1.12 General Hardware Description . 1-1
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M5272C3
M5272C3UM/D
TLC7733ID
PALLV16V8-10JC
MT48LC1M16A1TG-10JC
16Mbit
MC145583VF
RS232
48MHz
A42 BF 331
Date Code Formats diodes St Microelectronics
MCF5272C3
JP13
M5407C3
MCF5272
LST670 equivalent
MOLEX RJ45
lxt971l
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Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
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CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640face
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Untitled
Abstract: No abstract text available
Text: CDCUA877 www.ti.com SCAS769A – AUGUST 2006 – REVISED JUNE 2007 1.8-V PHASE LOCK LOOP CLOCK DRIVER • FEATURES • • • • • • • • 1.8-V/1.9-V Phase Lock Loop Clock Driver for Double Data Rate DDR II Applications Spread Spectrum Clock Compatible
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CDCUA877
SCAS769A
52-Ball
65-mm
CUA877/CAU878
PC2-3200/4300/5300/640Timers
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