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    1/INMOS T800 Search Results

    1/INMOS T800 Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    1008CT-800XGBC Coilcraft Inc General Purpose Inductor, 0.08uH, 2%, 1 Element, Ceramic-Core, SMD, 1008, CHIP, 1008, ROHS COMPLIANT Visit Coilcraft Inc Buy
    1008CT-800XGBB Coilcraft Inc General Purpose Inductor, 0.08uH, 2%, 1 Element, Ceramic-Core, SMD, 1008, CHIP, 1008, ROHS COMPLIANT Visit Coilcraft Inc Buy
    1008CT-800XKLC Coilcraft Inc General Purpose Inductor, 0.08uH, 10%, 1 Element, SMD, CHIP Visit Coilcraft Inc
    1008CT-800XGLB Coilcraft Inc General Purpose Inductor, 0.08uH, 2%, 1 Element, Ceramic-Core, SMD, 1211, CHIP, 1211, ROHS COMPLIANT Visit Coilcraft Inc
    1008CT-800X Coilcraft Inc RF inductor, ceramic core, 2% tol, SMT, RoHS Visit Coilcraft Inc
    1008CT-800XGL Coilcraft Inc RF inductor, ceramic core, 2% tol, SMT, RoHS Visit Coilcraft Inc

    1/INMOS T800 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    IMSC004

    Abstract: C004 T800 ims c012 IMS C004
    Text: IMS C004 Programmable link switch FEATURES H Standard INMOS serial links H 32 way crossbar switch H Regenerates input signal H Cascadable to any depth H No loss of signal integrity H 10 or 20 Mbits/sec operating speed LinkIn0 LinkOut0 H Separate INMOS configuration link


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    PDF LinkIn31 LinkOut31 IMSC004 C004 T800 ims c012 IMS C004

    T425

    Abstract: T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425
    Text: IMS T425 32-bit transputer FEATURES 32 bit architecture 40 ns internal cycle time 25 MIPS peak instruction rate Pin compatible with IMS T805, IMS T800, IMS T400 and IMS T414 Debugging support 4 Kbytes on-chip static RAM System Services 100 Mbytes/sec sustained data rate to internal


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    PDF 32-bit T425 T400 T414 T800 T805 inmos transputer T425 T800 transputer IMST425

    imsb426

    Abstract: b426 T800 IMS-B017 transputer IMS B426 inmos transputer
    Text: Chapter 24 197 IMS B426 32-bit transputer 4 Mbytes Size 1 TRAM Ëmos' Engineering Data 4Mbytes DRAM Terminated links FEATURES • IMS T800 Transputer • 4 Mbyte of one wait-state DRAM 160 ns memory cycle time • Size 1 TRAM • • Communicates via 4 INMOS serial links


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    PDF 32-bit B426-5 T800-25 B426-5 imsb426 b426 T800 IMS-B017 transputer IMS B426 inmos transputer

    IMST800

    Abstract: IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent
    Text: INMOS CORP IDE D | MfiOBbaa QDQ32fia 5 I DffimoS Chapter 3 T - 4 1 - 1 7 -5 7 • IMS T800 engineering data 45 iNnos T - * ¿ 4 - /? - & corp / ioE d | M a o 2 t,aa □ o o 3 5 a ci m | 46 1 Introduction vcc GND C a p P lu s C a p M in u s R eset A n a ly s e


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    PDF 02baa -Link123Special EventAc70 000000001A IMST800 IMS T800 T800 transputer inmos transputer inmos T414 T800 IMS T414 inmos transputer reference manual Transputer T414 T800 equivalent

    T800 transputer

    Abstract: T800 INMOS T800 2512 package resistor dimensions details Inmos inmos static ram
    Text: Chapter 25 203 IMS B427 mos 32-bit transputer 8 Mbytes Size 2 TRAM Engineering Data FEATURES GENERAL DESCRIPTION • 25MHz IMS T800 Transputer • 8 Mbyte of one wait-state DRAM 160 ns memory cycle time The IMS B427 Is a compact size 2 TRAM offering 8Mbytes of 4-cycle DRAM and subsystem


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    PDF 32-bit 25MHz B427-5 T800-25 B427-5 T800 transputer T800 INMOS T800 2512 package resistor dimensions details Inmos inmos static ram

    inmos T414

    Abstract: IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414
    Text: Chapter 17 149 IMS B401 TRAM 32-bit transputer 32 Kbytes Size 1 □ m os Engineering Data Reset Analyse-NotError ^ o /j- IMS T800 LinkO -«- h * or Linkl - - H , IMS T425 32 Kbytes SRAM Link2 Link3. Terminated links FEATURES GENERAL DESCRIPTION


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    PDF 32-bit chip800-25 T800-20 T425-25 T800-25 B401-3 B401-8 B401-5 inmos T414 IMS T414 T414 inmos transputer T425 IMSB401 T800 transputer inmos transputer IMSB008 T800 IMST414

    inmos transputer T425

    Abstract: T800 B411-8 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411
    Text: Chapter 20 167 IMS B411 TRAM 3 2 -b it transputer 1 Mbyte Size 1 oímos Engineering Data Reset • Analyse NotError - — < IMS T800 or 1 Mbyte LinkO - >| Linkl IMS T425 DRAM -I Link2 - -Link3 J -Terminated links FEATURES GENERAL DESCRIPTION


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    PDF T800-20 T425-20 T800-25 T425-25 B411-3 B411-7 B411-5 B411-8 inmos transputer T425 T800 TRAM IMST800 b008 IMS T800 IMSB008 ims pcb imsb411

    IMSB417

    Abstract: T800 inmos static ram
    Text: Chapter 23 189 IMS B417 TRAM 32-bit transputer 4 Mbytes Size 4 m os Engineering Data Reset Analyse NotError Terminated links Subsystem. PAL FEATURES IMS T800 25 MHz Transputer 64 Kbytes of zero wait-state SRAM 4 Mbytes of single wait-state DRAM Subsystem controller circuitry


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    PDF 32-bit 25MHz T800-25 B417-5 IMSB417 T800 inmos static ram

    EIA-343

    Abstract: G300B B-419 g300 video b419
    Text: Chapter 30 243 I M S B 4 1 9 Integrated graphics TRAM Size 6 OinimOS' Engineering Data FEATURES GENERAL DESCRIPTION • The IMS B419 incorporates the IMS G300B Co­ lour Video Controller CVC with the IMS T800 32 bit Floating Point Transputer to form a high per­


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    PDF T800-20 G300B B419-4 B419-4* F003A-1 F003A-1 EIA-343 B-419 g300 video b419

    IMS T414

    Abstract: inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800
    Text: / / ,' ï ! I NMOS CORP IDE D I 4 ö 0 2 töfl OOOaSTl 3 I IM S T 425 transputer nnm os Advance Data FEATURES 30 MIPS peak 15 MIPS sustained performance 32 bit architecture IMS T800 & IMS T414-20 hardware/pin compatible 4 Kbytes on chip RAM for 120 Mbytes/sec data rate


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    PDF T414-20 T425-G17S T425-G20S T425-G25S T425-G30S T425-J17S T425-J20S T425-G17M T425-G20M IMS T414 inmos transputer T425 inmos T414 IMST425 T414 inmos transputer reference manual IMS T800 MARK RF01 T425 T800

    ZR34325

    Abstract: Inmos T800 FLOATING POINT Co Processor f32c INMOS T800
    Text: Chapter 31 255 IMS B420 Vector processing TRAM Size 4 rnnos Engineering Data FEATURES GENERAL DESCRIPTION • IMS T800 -25 or T800 -20 floating point trans­ puter • High performance vector/signal processing co-processor ZR34325 —e.g. 1K complex FFT < 2ms for 25MHz co­


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    PDF ZR34325) 25MHz B420-3* B420-5* F000A-1 F007A-1 ZR34325 Inmos T800 FLOATING POINT Co Processor f32c INMOS T800

    IMS B404

    Abstract: T800 sRAM 2116 imsb404 2016 RAM
    Text: Chapter 21 173 IMS B404 TRAM 32—bit transputer 2 Mbytes Size 2 mos Engineering Data Reset Analyse NotError Subsystem _ PAL SSReset SSAnalyse notSSError FEATURES GENERAL DESCRIPTION • IMST800 Transputer • 32 Kbytes of zero wait-state SRAM • 2 Mbytes of single wait-state DRAM


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    PDF 32--bit IMST800 B404-3 T800-20 B404-8 T425-25 B404-5 T800-25 IMS B404 T800 sRAM 2116 imsb404 2016 RAM

    B408

    Abstract: B408 diode INMOS T800
    Text: Chapter 26 209 IMS B408 Frame store TRAM Size 8 mos Engineering Data FEATURES GENERAL DESCRIPTION • The IMS B408 implements the drawing and image storage parts of a medium to high perform­ ance graphics system. It incorporates a powerful 32-bit microprocessor with on-chip FPU, 1 Mbyte


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    PDF 32-bit T800-20 B408-3 B408 B408 diode INMOS T800

    worker

    Abstract: IMSB404 inmos transputer T425
    Text: Barrios Chapter 50 Developing parallel C programs for transputers INMOS Technical Note 68 435 Developing parallel C programs 50.1 437 Introduction This document presents a cook book approach to writing parallel C programs for single and networks of transputers.


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    PDF Dx214 worker IMSB404 inmos transputer T425

    IMSB401

    Abstract: inmos T414 Inmos T222
    Text: 0 O W IO S Chapter 48 Dual-In-Line Transputer Modules TRAMs (INMOS Technical Note 29) 389 Dual-ln-Line Transputer Modules (TRAMs) 48.1 391 Background In the early days of the transputer, INMOS built a number of transputer evaluation boards. Most are the same


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    PDF 220mm IMSB401 inmos T414 Inmos T222

    IMSC004

    Abstract: No abstract text available
    Text: Programmable link switch FEATURES H Standard INMOS serial links H 32 way crossbar switch H Regenerates input signal H Cascadable to any depth H No loss of signal integrity H 10 or 20 Mbits/sec operating speed H Separate INMOS configuration link H S ingle+5V


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    inmos m212 disk processor

    Abstract: T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801
    Text: Chapter 3 □ I mos* 23 IMS D7214 IMS D6214 IMS D5214 IMS D4214 ANSI C Toolset Product Information ANSI C cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Full ANSI C compiler X3.159-1989 • Validated against Plum Hall validation suite


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    PDF D4214 DC600A QIC-11, QIC-24, inmos m212 disk processor T222 inmos T414 D5214 IMSB404 inmos transputer reference manual ims-m212 Transputer T414 nec pc9801

    D4205

    Abstract: inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212
    Text: Chapter 2 9 □ mos IMS D7205 IMS D6205 IMS D5205 IMS D4205 0 C C 3 IT I 2 Toolset Product Information occam cross-development systems for IBM PC, NEC PC, Sun 3, Sun 4 and VAX hosts KEY FEATURES • Occam compiler for INMOS transputer family of processors


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    PDF D7205 D6205 D5205 D4205 D5205 D6205 inmos m212 disk processor B4043 D42050 T225 D505A IMS B404 T414 D705B ims-m212

    inmos T400

    Abstract: T400-T20S AD1230 T4-0065 800-00030 T400-J20S AD123 inmos transputer reference manual imst400
    Text: iZ J S G S -T H O M S O N ^ 7 # . » » I U I © « » IM S T 4 0 0 ® 32 bit transputer FEATURES 32 bit architecture 50 ns internal cycle time 20 MHz only 20 MIPS peak instruction rate 10 MIPS sustained instruction rate Pin compatible with IMS T805, IMS T800, IMS T425


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    ZR34325

    Abstract: IMS T800 F007A
    Text: Chapter 12 119 IMS F007A DSP libraries, C interface generator & linker □ mos Product Information Software for the IMS B420 VecTRAM KEY FEATURES • A library of more than a 100 ANSI C routines for common signal/vector processing applications. • Compatible with Zoran’s library ZoranLib 2.0 for ZR34325.


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    PDF F007A ZR34325. Dx214) 360Kbyte 720Kbyte F007A F007A-1 ZR34325 IMS T800

    T805E

    Abstract: No abstract text available
    Text: w# SGS-THOMSON IMS T805E 32-bit floating-point transputer - Extended temperature FEATURES • 32 bit architecture ■ 50 ns internal cycle time ■ 20 MIPS peak instruction rate ■ 2.8 Mflops (peak) instruction rate ■ Pin compatible with IMS T800 ■


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    PDF T805E 32-bit T805E

    Untitled

    Abstract: No abstract text available
    Text: Chapter 6_ 53 ALSYS Ada Compiler aAyv Product Information Ada cross-development systems for IBM PC, and VAX hosts KEY FEATURES • Full Ada Compiler ANSI/MIL-STD 1815A • Validated by United States Government Joint Ada Program Office


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    ZR34325

    Abstract: No abstract text available
    Text: 69 Chapter 8 IMS FOOOB VecTRAM library □ Product Information A software support package for the IMS B420 Vector Processing TRAM KEY FEATURES • Dramatically speeds up parallel applications and increases system performance involving vector/signal processing compulation.


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    PDF Dx205 Dx214 360Kbyte 720Kbyte ZR34325

    B-429

    Abstract: 0x00000010 inmos a110 b429 IMST800
    Text: Chapter 34 295 IMS B429 Video Image Processing TRAM VIP f mos Advance Information The information in this section is subject to change FEATURES Real time (30f/s) monochrome image capture and 2d image filtering. Can capture from PAL, NTSC, and other image formats.


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    PDF 30f/s) 512x512 A110s T800-20 B-429 0x00000010 inmos a110 b429 IMST800