FOR1B
Abstract: No abstract text available
Text: EM47CM1688SBB1 1 Revision1History1 1 Revision10.11 Jun.12012 1 -First1release.1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Jun.120121 1/381 www.eorex.com1 1 EM47CM1688SBB1 1 1Gb1(8Mx8Bank×16)1Double1DATA1RATE131SDRAM1
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EM47CM1688SBB1
Revision10
1Double1DATA1RATE131SDRAM1
CL-11
1CL-21
141with1Burst1Chop1
1and18
196Ball-FBGA1
FOR1B
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Untitled
Abstract: No abstract text available
Text: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 EM47EM3288SBA Revision History Revision 0.1 May. 2012 -First release. Revision 0.2 (Feb. 2013) -Update ZQ pins description. May. 2012 1/38 www.eorex.com 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 EM47EM3288SBA 8Gb (32Mx8Bank×32) Double DATA RATE 3 Stack SDRAM
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EM47EM3288SBA
136Ball-FBGA
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EM47DM1688SBB
Abstract: No abstract text available
Text: EM47DM1688SBB Revision History Revision 0.1 Jun. 2012 -First release. Jun. 2012 1/38 www.eorex.com EM47DM1688SBB 2Gb (16Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47DM1688SBB
96Ball-FBGA
EM47DM1688SBB
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Untitled
Abstract: No abstract text available
Text: EM47EM0888SBA Revision History Revision 0.1 Oct. 2011 -First release. Revision 0.2 (Apr. 2012) - Update package dimension to 8 x 10.5 mm2. Revision 0.3 (Sep. 2013) - Add package dimension 7.5 x 10.6 mm2. Revision 0.4 (Mar. 2014) - Add DDR3 speed 1866. Revision 0.5 (Jul. 2014)
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EM47EM0888SBA
78Ball-FBGA
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EM47EM1688SBC
Abstract: No abstract text available
Text: EM47EM1688SBC Revision History Revision 0.1 Oct. 2014 -First release. Oct. 2014 1/37 www.eorex.com EM47EM1688SBC 4Gb (32Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47EM1688SBC
96Ball-FBGA
EM47EM1688SBC
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Untitled
Abstract: No abstract text available
Text: EM47EM1688SBB Revision History Revision 0.1 Mar. 2012 -First release. Revision 0.2 (Oct. 2013) -Add package size. Oct. 2013 1/39 www.eorex.com EM47EM1688SBB 4Gb (32Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V.
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EM47EM1688SBB
96Ball-FBGA
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Untitled
Abstract: No abstract text available
Text: EM47EM1688SBA Revision History Revision 0.1 Mar. 2012 -First release. Mar. 2012 1/37 www.eorex.com EM47EM1688SBA 4Gb (32Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V 0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47EM1688SBA
96Ball-FBGA
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Untitled
Abstract: No abstract text available
Text: EM47FM0888MBA 4Gb 64Mx8Bank×8 Double DATA RATE 3 low voltage SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.35V(1.283-1.45V) • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation.
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EM47FM0888MBA
78Ball-FBGA
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EM47FM0888SBA
Abstract: No abstract text available
Text: EM47FM0888SBA 4Gb 64Mx8Bank×8 Double DATA RATE 3 low voltage SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation.
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EM47FM0888SBA
78Ball-FBGA
EM47FM0888SBA
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Untitled
Abstract: No abstract text available
Text: EM47EM0888SBA Revision History Revision 0.1 Oct. 2011 -First release. Revision 0.2 (Apr. 2012) - Package dimension change – delete 9 x 10.5 mm2, add 8 x 10.5 mm2. Apr. 2012 1/39 www.eorex.com EM47EM0888SBA 2Gb (32Mx8Bank×8) Double DATA RATE 3 SDRAM Features
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EM47EM0888SBA
78Ball-FBGA
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EM47FM1688MCA
Abstract: No abstract text available
Text: EM47FM1688MCA/SCA 8Gb 32Mx8Bank×16×2Rank Double DATA RATE 3 SDRAM Features Description • Use Two 256M x 16 dies stack to 256M x 16 x 2R DDP. • VDD/VDDQ = 1.35V -0.065/+0.1V • Backward compatible to VDD/ VDDQ = 1.5V ±0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47FM1688MCA/SCA
96Ball-FBGA
EM47FM1688MCA
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EM47DM1688SBC
Abstract: No abstract text available
Text: EM47DM1688SBC Revision History Revision 0.1 Jan. 2013 -First release. Revision 0.2 (Feb. 2014) -Update DC current. Feb. 2014 1/38 www.eorex.com EM47DM1688SBC 2Gb (16Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V.
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EM47DM1688SBC
96Ball-FBGA
EM47DM1688SBC
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AT0340
Abstract: RA12 fbga-96ball EM47CM1688SBA-150
Text: EM47CM1688SBA Revision History Revision 0.1 Oct . 2011 -First release. Oct. 2011 1/38 www.eorex.com EM47CM1688SBA 1Gb (8Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47CM1688SBA
96Ball-FBGA
AT0340
RA12
fbga-96ball
EM47CM1688SBA-150
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EM47EM1688MBB
Abstract: No abstract text available
Text: EM47EM1688MBB Revision History Revision 0.1 Oct. 2013 -First release. Oct. 2013 1/38 www.eorex.com EM47EM1688MBB 4Gb (32Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.35V-0.065/+0.1V • Backward compatible to VDD/ VDDQ = 1.5V ±0.075V.
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EM47EM1688MBB
96Ball-FBGA
9x13mm)
EM47EM1688MBB
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EM47EM3288SBA
Abstract: No abstract text available
Text: EM47EM3288SBA Revision History Revision 0.1 May. 2012 -First release. Revision 0.2 (Feb. 2013) -Update ZQ pins description. Revision 0.3 (Apr. 2014) -Update tFAW. Apr. 2014 1/39 www.eorex.com EM47EM3288SBA 8Gb (32Mx8Bank×32) Double DATA RATE 3 Stack SDRAM
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EM47EM3288SBA
12x14x1
136Ball-FBGA
5x14x1
EM47EM3288SBA
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CH-8320
Abstract: E315836 34SH0200X Baumer SENSOR CH-8501 IWRM baumer electric ch-8501 frauenfeld IWRM
Text: Elektrischer Anschluss Connection diagram Schéma de raccordement Abmessungen Dimensions Dimensions IWRM 12I9704/S14X IWRM ~ ~ ~ M12 x 1 Distance measuring BU 3 output BN = Braun/brown/brun WH = Weiss/white/blanc BU = Blau/blue/bleu Z 0V • Vor dem Anschliessen des Sensors die Anlage spannungsfrei schalten.
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12I9704/S14X
94/9/EG
2004/108/EC,
94/9/EC
2004/108/CE,
94/9/CE
CH-8320
12ATEX
0123X
E315836
34SH0200X
Baumer SENSOR CH-8501 IWRM
baumer electric ch-8501 frauenfeld IWRM
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Untitled
Abstract: No abstract text available
Text: EM47DM1688SBB1 1 Revision1History1 1 Revision10.11 Jun.12012 1 -First1release.1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Jun.120121 1/381 www.eorex.com1 1 EM47DM1688SBB1 1 2Gb1(16Mx8Bank×16)1Double1DATA1RATE131SDRAM1
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EM47DM1688SBB1
Revision10
1Double1DATA1RATE131SDRAM1
141with1Burst1Chop1
1and18
MR31bit1A21
196Ball-FBGA1
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FOR1B
Abstract: AC1501
Text: EM47DM1688SBC1 1 Revision1History1 1 Revision10.11 Jan.12013 1 -First1release.1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Jan.120131 1/381 www.eorex.com1 1 EM47DM1688SBC1 1 2Gb1(16Mx8Bank×16)1Double1DATA1RATE131SDRAM1
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EM47DM1688SBC1
Revision10
1Double1DATA1RATE131SDRAM1
141with1Burst1Chop1
1and18
MR31bit1A21
196Ball-FBGA1
FOR1B
AC1501
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EM47EM3288MBA
Abstract: No abstract text available
Text: EM47EM3288MBA 8Gb 32Mx8Bank×32 Double DATA RATE 3 Stack SDRAM Features Description • VDD/VDDQ = 1.35V -0.065/+0.1V. • Backward compatible to VDD = VDDQ = 1.5V ±0.075V.Supports DDR3L devices to be backward compatible in 1.5V applications. • Fully differential clock inputs (CK, /CK) operation.
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EM47EM3288MBA
136Ball-FBGA
EM47EM3288MBA
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EM47FM3288SBB
Abstract: No abstract text available
Text: EM47FM3288SBB 16Gb 64Mx8Bank×32 Double DATA RATE 3 Stack SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation. • Eight Banks
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EM47FM3288SBB
136Ball-FBGA
EM47FM3288SBB
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Untitled
Abstract: No abstract text available
Text: EM47CM1688SBB Revision History Revision 0.1 Jun. 2012 -First release. Revision 0.2 (Feb. 2014) -Update DC current. Feb. 2014 1/39 www.eorex.com EM47CM1688SBB 1Gb (8Mx8Bank×16) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V.
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EM47CM1688SBB
96Ball-FBGA
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FBGA78
Abstract: 78 ball fbga EM47EM0888SBA-150E
Text: EM47EM0888SBA Revision History Revision 0.1 Oct. 2011 -First release. Oct. 2011 1/39 www.eorex.com EM47EM0888SBA 2Gb (32Mx8Bank×8) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47EM0888SBA
78Ball-FBGA
FBGA78
78 ball fbga
EM47EM0888SBA-150E
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PDF
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Untitled
Abstract: No abstract text available
Text: EM47DM0888SBA Revision History Revision 0.1 May. 2011 -First release. May. 2011 1/39 www.eorex.com EM47DM0888SBA 1Gb (16Mx8Bank×8) Double DATA RATE 3 SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V 0.075V. • All inputs and outputs are compatible with SSTL_15
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EM47DM0888SBA
78Ball-FBGA
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Untitled
Abstract: No abstract text available
Text: 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 EM47FM3288SBB 16Gb 64Mx8Bank×32 Double DATA RATE 3 Stack SDRAM Features Description • JEDEC Standard VDD/VDDQ = 1.5V±0.075V. • All inputs and outputs are compatible with SSTL_15 interface. • Fully differential clock inputs (CK, /CK) operation.
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EM47FM3288SBB
136Ball-FBGA
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