002343D Search Results

t8891

Abstract: No abstract text available
Text: In te g rate d D e vic e Technology, Inc. LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE IDT54/74FCT88915TT 55/70/100/133 PRELIMINARY is fed back to the PLL at the FEEDBACK input resulting in essentially delay across the device. The PLL consists of the