Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    "PROGRAMMABLE PERIPHERAL INTERFACE" PENTIUM Search Results

    "PROGRAMMABLE PERIPHERAL INTERFACE" PENTIUM Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TB67S539FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=2/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S141AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Phase Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S149AFTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Unipolar Type/Vout(V)=84/Iout(A)=3/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    TB67S549FTG Toshiba Electronic Devices & Storage Corporation Stepping Motor Driver/Bipolar Type/Vout(V)=40/Iout(A)=1.5/Clock Interface Visit Toshiba Electronic Devices & Storage Corporation
    DCL541A01 Toshiba Electronic Devices & Storage Corporation Digital Isolator / VDD=2.25~5.5V / 150Mbps / 4 channel(F:R=3:1) / Default Output Logic: Low / Input disable Visit Toshiba Electronic Devices & Storage Corporation

    "PROGRAMMABLE PERIPHERAL INTERFACE" PENTIUM Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    EP1M120

    Abstract: No abstract text available
    Text: Using Programmable I/O Standards in Mercury Devices May 2003, ver. 2.2 Introduction Application Note 134 Programmable logic devices PLDs use I/O standards to interface with memory, microprocessors, backplanes, and peripheral devices. Designers who want to use these standards with programmable logic need flexible,


    Original     		PDF

    EP1M120

    Abstract: No abstract text available
    Text: Using Programmable I/O Standards in Mercury Devices June 2001, ver. 1.0 Introduction Application Note 134 Programmable logic devices PLDs use I/O standards to interface with memory, microprocessors, backplanes, and peripheral devices. Designers who want to use these standards with programmable logic need flexible,


    Original     		PDF

    EP1M120

    Abstract: No abstract text available
    Text: Using Programmable I/O Standards in Mercury Devices December 2002, ver. 2.1 Introduction Application Note 134 Programmable logic devices PLDs use I/O standards to interface with memory, microprocessors, backplanes, and peripheral devices. Designers who want to use these standards with programmable logic need flexible,


    Original     		PDF

    JESD 85

    Abstract: circuit diagram of Key finder
    Text: Using Programmable I/O Standards in Mercury Devices April 2002, ver. 2.0 Introduction Application Note 134 Programmable logic devices PLDs use I/O standards to interface with memory, microprocessors, backplanes, and peripheral devices. Designers who want to use these standards with programmable logic need flexible,


    Original     		PDF

    P1284

    Abstract: 52ONE XFRV
    Text: Implementing an 8-Bit Asynchronous Peripheral Interface Utilizing the EZ-USB FX GPIF/Slave FIFOs Abstract Hardware Connection Diagram This application note discusses how to configure the General Programmable Interface GPIF and slave FIFOs of the EZ-USB® FX™ to implement an 8-bit asynchronous interface. The GPIF is a programmable 8- or 16-bit parallel interface that allows designers to reduce system costs by providing a glueless interface between the EZ-USB FX and many


    Original     		16-bit P1284) P1284 52ONE XFRV PDF

    ez 724

    Abstract: 358 ez 802 ez 748 393 EZ 932 EZ 941 358 ez 902 358 ez 650 ez 643 393 EZ 639 EZ 711 253
    Text: Implementing an 8-Bit Asynchronous Peripheral Interface Utilizing the EZ-USB FX GPIF/Slave FIFOs Abstract Hardware Connection Diagram This application note discusses how to configure the General Programmable Interface GPIF and slave FIFOs of the EZ-USB® FX™ to implement an 8-bit asynchronous interface. The GPIF is a programmable 8- or 16-bit parallel interface that allows designers to reduce system costs by providing a glueless interface between the EZ-USB FX and many


    Original     		16-bit P1284) interfaces2002. ez 724 358 ez 802 ez 748 393 EZ 932 EZ 941 358 ez 902 358 ez 650 ez 643 393 EZ 639 EZ 711 253 PDF

    colour tv chroma section

    Abstract: 133MHZ 200MHZ CCIR656 CRC-16 PBGA388 programmable peripheral Interface pentium pentium mmx upscaler stpc pictor
    Text: STPC PICTOR X86 CORE PC COMPATIBLE SOC with GRAPHICS and VIDEO PRODUCT PREVIEW • ■ PENTIUM II CLASS CORE RUNNING IN X1 MODE UP TO 133MHZ OR X2 MODE UP TO 200MHZ 64 BIT SDRAM CONTROLLER RUNNING AT UP TO 100 MHZ ■ VGA & SVGA CRT CONTROLLER ■ 135MHz RAMDAC


    Original     		133MHZ 200MHZ 135MHz IDE-33 16-BIT colour tv chroma section 200MHZ CCIR656 CRC-16 PBGA388 programmable peripheral Interface pentium pentium mmx upscaler stpc pictor PDF

    AMD k6 addressing mode

    Abstract: 82C691 CY2254ASC-2 CY27C010 CY82C691 CY82C692 CY82C693 CY82C694 cy82 amd k5 32 bit block diagram
    Text: fax id: 3806 1h C-DX PRELIMINARY CY82C69x Pentium hyperCache™ Chipset Family System Features — General purpose I/O pins and registers • Flexible power management with five timers and ten programmable event detectors • Full system, data, cache, and peripheral control


    Original     		CY82C69x CY82C691 CY82C692 128-KB CY82C693 CY82C693U CY82C694 128-KB 8Kx21 AMD k6 addressing mode 82C691 CY2254ASC-2 CY27C010 cy82 amd k5 32 bit block diagram PDF

    LCD 1602 INTERFACE

    Abstract: ARM720T CL-PS6700 CL-PS7111 EP7211 UCB1100 UCB1200 IR LED and photodiode 5 PEN PC TECHNOLOGY advance EDB7211
    Text: EP7211 Preliminary Product Bulletin FEATURES High-Performance Ultra-Low-Power System-on-Chip with LCD Controller n Dynamically programmable clock speeds of 18, 36, 49, and 74 MHz at 2.5 V n Performance matching 100-MHz Intel Pentium-based PC n Socket and register compatible with CL-PS7111


    Original     		EP7211 100-MHz CL-PS7111 EP7211 PB452PP03 LCD 1602 INTERFACE ARM720T CL-PS6700 CL-PS7111 UCB1100 UCB1200 IR LED and photodiode 5 PEN PC TECHNOLOGY advance EDB7211 PDF

    ibm pc keyboard controller

    Abstract: what is cache memory 8042 "Keyboard Controller" CY82C693 CY82C691 CY82C692 CY82C694 8042 Keyboard Controller cy82 programmable peripheral Interface pentium
    Text: BACKGROUND Chipset for Pentium-Based PCs Integrates Cache to Boost Performance, Cut System Cost Historically, as the density of integrated circuits has increased, the chip count in personal computers has decreased. And no one seriously doubts that as process technology continues


    Original     		PDF

    remote control helicopter circuit diagram

    Abstract: 32 pin eprom to eprom copier circuit 8031 program reader Magic*PRO III VOICE control elevator magicPRO helicopter remote control design KEYPAD 4 X 3 verilog source code verilog code for stepper motor remote control helicopter circuit diagram 24
    Text: Return to Main Menu Save Power, Product size, Design time and Money! Before I/O LATCH W PLD SRAM EPROM I/O ANY MCU LATCH hen your design requirements exceed the capability of your MCU, add a PSD microcontroller peripheral IC and get many more resources, simplify the design process, and cost reduce


    Original     		PDF

    Intel 8237 dma controller block diagram

    Abstract: programmable peripheral Interface pentium CRC-16 PBGA388 Pentium 166 MMX intel 8259 programmable interrupt controller
    Text: STPC VEGA X86 CORE PC COMPATIBLE SOC with ETHERNET and USB PRODUCT PREVIEW • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ PENTIUM II CLASS PROCESSOR UP TO 250 MHZ 64-BIT SDRAM CONTROLLER RUNNING AT UP TO 100 MHZ PCI 2.2 COMPLIANT MASTER/SLAVE


    Original     		64-BIT DMA-66 16-BIT PBGA388 Intel 8237 dma controller block diagram programmable peripheral Interface pentium CRC-16 PBGA388 Pentium 166 MMX intel 8259 programmable interrupt controller PDF

    8259 Programmable Peripheral Interface

    Abstract: VEGA CRC-16 PBGA388 DMA Controller 8237 802.3 CRC32
    Text: STPC VEGA X86 CORE PC COMPATIBLE SOC with ETHERNET and USB DATA BRIEF • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ PENTIUM® II CLASS PROCESSOR CORE 64-BIT SDRAM CONTROLLER RUNNING AT UP TO 100 MHZ PCI 2.1 COMPLIANT MASTER/SLAVE


    Original     		64-BIT DMA-66 16-BIT PBGA388 8259 Programmable Peripheral Interface VEGA CRC-16 PBGA388 DMA Controller 8237 802.3 CRC32 PDF

    CY82C691

    Abstract: bsram CY2254ASC-2 CY27C010 CY82C692 CY82C694 cy82 "programmable peripheral Interface" pentium amd cpu k5 4Kx64
    Text: hCĆZX/hCĆVX/ ADVANCED INFORMATION hCĆDX Pentium t hyperCachetChipset Family System Features hCĆVX hCĆDX hCĆZX D Value solution with integrated 128ĆKB twoĆway set associative pipelined burst SRAM D Performance solution with 256ĆKB twoĆway set associative pipelined


    Original     		128KB 256KB CY82C692 CY82C691 CY82C690 CY82C693/U bsram CY2254ASC-2 CY27C010 CY82C694 cy82 "programmable peripheral Interface" pentium amd cpu k5 4Kx64 PDF

    802.3 CRC32

    Abstract: DMA Controller 8237 Mac-1 programmable peripheral Interface pentium VEGA CRC-16 PBGA388 8259 Programmable Peripheral Interface x86 soc
    Text: STPC VEGA X86 CORE PC COMPATIBLE SOC with ETHERNET and USB DATA BRIEF PENTIUM® II CLASS PROCESSOR CORE 64-BIT SDRAM CONTROLLER RUNNING AT UP TO 100 MHZ PCI 2.1 COMPLIANT MASTER/SLAVE CONTROLLER • ■ ■ ISA MASTER / SLAVE DUAL PORT USB HOST CONTROLLER


    Original     		64-BIT DMA-66 16-BIT PBGA388 802.3 CRC32 DMA Controller 8237 Mac-1 programmable peripheral Interface pentium VEGA CRC-16 PBGA388 8259 Programmable Peripheral Interface x86 soc PDF

    PXI-6533

    Abstract: 8255 PPI INTEL DAQDIO Peripheral interface 8255 8255 PPI Chip 82C55 TBX-68 PPI 82C55 intel 430FX 8255 pci or dma
    Text: High-Speed Digital I/O Module PXI-6533 PXI-6533 Digital I/O 32 lines Transfer rates up to 20 Mwords/s TTL/CMOS compatible I/O Two independent data paths 8,16, or 32-bit transfers Start and stop triggering Pattern detection Change detection Solutions Automated test equipment ATE


    Original     		PXI-6533 32-bit PXI-6533 32-bit, 430FX) 430FX 8255 PPI INTEL DAQDIO Peripheral interface 8255 8255 PPI Chip 82C55 TBX-68 PPI 82C55 intel 430FX 8255 pci or dma PDF

    8kx1 RAM

    Abstract: 82C691 CY10 CY82C691 CY82C692 CY82C693 512k ADS22
    Text: ADVANCED INFORMATION Features Pentiumt hyperCachet Chipset System Controller D Supports synchronous or asynchronous PCI operation D Supports six banks of DRAM six RAS lines D D D Supports DRAM densities up to 16 Mb D Provides glueless (0 TTL) system solution with CY82C692 and


    Original     		CY82C692 CY82C693 208pin 8Kx21 8kx1 RAM 82C691 CY10 CY82C691 CY82C693 512k ADS22 PDF

    SLOT PGA 370

    Abstract: RadiSys MC146818B pcI diagnostic card codes vga D-sub connector 82562ET EPC-2325 EPC2325S phoenixbios
    Text: EPC-2325 PCI/ISA Single Board Computer FEATURE SUMMARY 370-pin PGA socket for Intel Celeron and Pentium III processors in FC-PGA and FC-PGA2 packages Intel® 815 GMCH and C-ICH chipset Up to 512MB SDRAM Integrated VGA controller Dual 10/100 Ethernet ports


    Original     		EPC-2325 370-pin 512MB -2325/EPC EPC2325S-126-0 866MHz EPC2325-866-0 EPC-2325 SLOT PGA 370 RadiSys MC146818B pcI diagnostic card codes vga D-sub connector 82562ET EPC2325S phoenixbios PDF

    jermyn distributor

    Abstract: WSI PSD 813 PSD813F1 80C196 packaging handbook WSI Corporation pr 15 e BB 313 HATTELAND mitsubishi rs232 cable ZPSD211R
    Text: PSD MCU Peripherals Return to Main Menu What is a ZPSD and why should I use It? 1 C1 68H A Zero-Power Programmable System Device ZPSD is a support chip used with low-cost microcontrollers (MCU) in embedded control applications. PSDXF 8X 31 80C PSDXF 8X 11


    Original     		PDF

    lms algorithm using verilog code

    Abstract: lms algorithm using vhdl code ATM machine working circuit diagram using vhdl verilog code for lms adaptive equalizer verilog code for lms adaptive equalizer for audio digital IIR Filter VHDL code 8086 microprocessor based project verilog DTMF decoder qpsk demodulation VHDL CODE verilog code for fir filter using DA
    Text: AMPP Catalog June 1998 About this Catalog June 1998 AMPP Catalog Contents This catalog provides information on Altera Megafunction Partners Program AMPPSM partners and provides descriptions of megafunctions from each AMPP partner. The information in this catalog is current as of


    Original     		PDF

    PCI-DIO-32HS

    Abstract: 8255 intel 8255 Chip 8255 operating modes PCI-DIO R6850-D1 8255 pci or dma pcidio32hs intel 8255 pin diagram 8255 a pin diagram
    Text: High-Speed 32-Bit Pattern Generation and Acquisition Digital I/O PCI-DIO-32HS, PXI-6533, DAQCard-6533, AT-DIO-32HS PCI-DIO-32HS, PXI-6533, DAQCard-6533, AT-DIO-32HS Digital I/O 32 digital I/O lines Transfer rates up to 76 MB/s PCI TTL/CMOS compatible I/O


    Original     		32-Bit PCI-DIO-32HS, PXI-6533, DAQCard-6533, AT-DIO-32HS PCI-DIO-32HS 8255 intel 8255 Chip 8255 operating modes PCI-DIO R6850-D1 8255 pci or dma pcidio32hs intel 8255 pin diagram 8255 a pin diagram PDF

    TYPE OF SRAM

    Abstract: pentium MOTHERBOARD CIRCUIT diagram PC MOTHERBOARD CIRCUIT diagram VIA chipset 8042 keyboard controller datasheet architecture of pentium microprocessor Pentium super space computer mother board circuit diagram computer mouse circuit diagram intel 8042
    Text: BACKGROUND Chipset for Pentium-Based PCs Integrates Cache to Boost Performance, Cut System Cost Historically, as the density of integrated circuits has increased, the chip count in personal computers has decreased. And no one seriously doubts that as process technology continues to evolve, ultimately a single-chip solution will emerge. Until that time,


    Original     		PDF

    74x138

    Abstract: STpc ISA BUS spec VEGA of 7490 IC decade counter HCMOS GATE ARRAY BGA stmicroelectronics ic 7490 7 segment decade counter internal diagram of 7490 decade counter ic 7490 pin diagram decade counter 7490 Decade Counter pin connections
    Text: STPC VEGA X86 CORE PC COMPATIBLE SOC with ETHERNET and USB PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ PENTIUM® II CLASS PROCESSOR CORE 64-BIT SDRAM CONTROLLER RUNNING AT UP TO 100 MHZ PCI 2.1 COMPLIANT MASTER/SLAVE


    Original     		64-BIT DMA-66 16-BIT PBGA388 74x138 STpc ISA BUS spec VEGA of 7490 IC decade counter HCMOS GATE ARRAY BGA stmicroelectronics ic 7490 7 segment decade counter internal diagram of 7490 decade counter ic 7490 pin diagram decade counter 7490 Decade Counter pin connections PDF

    Untitled

    Abstract: No abstract text available
    Text: fax id: 3806 PRELIMINARY CY82C69X Pentium hyperCache™ Chipset Family — General purpose I/O pins and registers System Features • Flexible power management with five timers and ten programmable event detectors • Full system, data, cache, and peripheral control


    OCR Scan     		CY82C69X CY82C691 CY82C692 128-KB CY82C693 CY82C693U CY82C694 8Kx21 128-KB) PDF